SCANSTA101

SNLS057J – MAY 2002 – REVISED APRIL 2013

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Table 20. Interrupt Status Register (INTSTAT) ($03) (1)

Bit(s)

Type

Field

Address Offset

Reset Value

Reset Source

15:13

RO

Reserved

0

00b

12

RW

TDO Half-empty Interrupt (2)

0

0b

SYS_RST

11

RW

TDO Empty Interrupt

0

1b

SYS_RST

10

RW

TDI Full Interrupt

0

0b

SYS_RST

9

RW

TDI Half-full Interrupt (2)

0

0b

SYS_RST

8

RW

Sequencer Interrupt

0

0b

SYS_RST

7:3

RO

Reserved Vector x Interrupt (3) (4)

0

00000b

2:0

RW

Vector x Interrupt (4)

0

000b

SYS_RST

(1)

This register is writable in debug mode only.

(2)

Half full or half empty designates 56 long words.

(3)

Reserved Vector x Interrupt for future growth for the number of vectors.

(4)

Drivers shouldn't allow Sequencer Interrupt and Vector x Interrupt to be set at same time. Sequencer Interrupt has priority over the

Vector x Interrupt.

TDO Half-empty Interrupt

TDO_SM memory space half empty status

'1'

TDO_SM memory space half empty

'0'

TDO_SM memory space not half empty

TDO Empty Interrupt

TDO_SM memory space empty status

'1'

TDO_SM memory space empty

'0'

TDO_SM memory space not empty

TDI Full Interrupt

TDI_SM memory space full status

'1'

TDI_SM memory space full

'0'

TDI_SM memory space not full

TDI Half-full Interrupt

TDI_SM memory space half full status

'1'

TDI_SM memory space half full

'0'

TDI_SM memory space not half full

Sequencer Interrupt

Sequencer completed status

'1'

Sequencer processing completed

'0'

Sequencer processing or not started

Vector Interrupt<2:0>

Vector "x" completed status, where "x" is the vector number, a binary encoding of bits <2:0>. Only

vectors 1 through 4 are valid. Vectors 5 through 7 reserved for future use.

'000'

No vector completed activity

'001'

Vector 1 completed

'010'

Vector 2 completed

'011'

Vector 3 completed

'100'

Vector 4 completed

Table 21. Setup Register (SETUPR) ($04)

Bit(s)

Type

Field

Address Offset

Reset Value

Reset Source

15

RW

16/32 bit Mode

0

0b

SYS_RST

14:10

RO

Reserved

0

00h

11:10

RW

TDO_SM Ctrl

0

00b

SYS_RST

9:7

RW

Sync Bit Length

0

000b

SYS_RST

6

RW

Default TDO Value

0

1b

SYS_RST

5

RW

Debug Mode

0

0b

SYS_RST

4

RW

ScanBridge Support Initiate/ Release

0

0b

SYS_RST

3

RW

TRST

0

0b

SYS_RST

2

RW

Reset

0

0b

SYS_RST

1:0

RW

Test Loop-Back

0

11b

SYS_RST

28

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