SCL

VIH

VIL

VIH

VIL

P

S

S

P

SDA

tHD;DAT

tSU;STO

tHD;STA

tSU;STA

t SU;DAT

tHIGH

tBUF

t LOW

tR

tF

LM5056, LM5056A

www.ti.com

SNVS827A – OCTOBER 2012 – REVISED APRIL 2013

Figure 19. SMBus Timing Diagram

Table 43. SMBus Timing Definition

LIMITS

SYMBOL

PARAMETER

UNITS

MIN

MAX

FSMB

SMBus operating frequency

10

400

kHz

TBUF

Bus free time between stop and start condition

1.3

Hold time after (repeated) start condition. After this period, the first clock is

THD:STA

0.6

generated.

μs

TSU:STA

Repeated start condition setup time

0.6

TSU:STO

Stop condition setup time

0.6

THD:DAT

Data hold time

85

ns

TSU:DAT

Data setup time

100

TTIMEOUT

Clock low time-out(1)

25

35

ms

TLOW

Clock low period

1.5

μs

THIGH

Clock high period(2)

0.6

TLOW:SEXT

Clock high period(3)

25

ms

TLOW:MEXT

Cumulative low extend time (master device)(4)

10

TF

Clock or data fall time(5)

20

300

ns

TR

Clock or data rise time(5)

20

300

(1)

Devices participating in a transfer will timeout when any clock low exceeds the value of TTIMEOUT,MIN of 25 ms. Devices that have

detected a timeout condition must reset the communication no later than TTIMEOUT,MAX of 35 ms. The maximum value must be

adhered to by both a master and a slave as it incorporates the cumulative stretch limit for both a master (10 ms) and a slave (25 ms).

(2)

THIGH MAX provides a simple method for devices to detect bus idle conditions.

(3)

TLOW:SEXT is the cumulative time a slave device is allowed to extend the clock cycles in one message from the initial start to the stop. If

a slave exceeds this time, it is expected to release both its clock and data lines and reset itself.

(4)

TLOW:MEXT is the cumulative time a master device is allowed to extend its clock cycles within each byte of a message as defined from

start-to-ack, ackto- ack, or ack-to-stop.

(5)

Rise and fall time is defined as follows:

(a) TR = (VILMAX – 0.15) to (VIHMIN + 0.15)

(b) TF = 0.9 VDD to (VILMAX – 0.15)

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