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IP1000ALF bảng dữ liệu(PDF) 48 Page - List of Unclassifed Manufacturers

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IP1000ALF bảng dữ liệu(HTML) 48 Page - List of Unclassifed Manufacturers

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IP1000A LF
Preliminary Data Sheet
48/75
July 5, 2005
Copyright © 2005, IC Plus Corp.
IP1000A LF-DS-R08
3.2.2.4
ClassCode
Class............................. PCI Configuration Registers
I/O Base Address ......... PCI device configuration header start
Address Offset .............. 0x09
Default Value ................ 0x020000
Access Rule.................. Byte
Width ............................ 24 bits
Bit
BIT Name
BIT Description
Type
HW
Reset
SW
Reset
23..0
ClassCode
Class Code. ClassCode identifies the general
function of the PCI device. A value of 0x020000
indicates an Ethernet network controller.
R
3.2.2.5
ConfigCommand
Class............................. PCI Configuration Registers
I/O Base Address ......... PCI device configuration header start
Address Offset .............. 0x04
Default Value ................ 0x0000
Access Rule.................. Word
Width ............................ 16 bits
ConfigCommand provides control over the IP1000A LF’s ability to generate and respond to PCI cycles.
When ConfigCommand is a logic 0, the IP1000A LF is logically disconnected from the PCI bus, except
for configuration cycles.
Bit
BIT Name
BIT Description
Type
HW
Reset
SW
Reset
0
IoSpace
I/O Space. When IoSpace is a logic the IP1000A
LF can respond to I/ O space accesses (if the
IP1000A LF is in the D0 power state).
R/W
1
MemorySpace
Memory Space. When MemorySpace, and the
AddressDecodeEnable
bit
in
the
ExpRomBaseAddress register are both a logic 1,
and if the IP1000A LF is in the D0 power state, the
IP1000A LF is able to decode accesses to an
Expansion ROM (if present).
R/W
2
BusMaster
Bus Master. When BusMaster is a logic 1 the
IP1000A LF is able to initiate bus master cycles (if
the adapter is in the D0 power state).
R/W
3
SpecialCycles
Special Cycles. When SpecialCycles is a logic 0,
the
IP1000A LF
ignores
all
Special
Cycle
operations. When SpecialCycles is a logic 1, the
IP1000A LF can monitor Special Cycle operations.
R
4
MWlEnable
Memory Write and Invalidate Enable. When
MWlEnable is a logic 1 the IP1000A LF is
permitted to use the MWI command.
R/W



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