40 / 75 page
IP1000A LF
Preliminary Data Sheet
40/75
July 5, 2005
Copyright © 2005, IC Plus Corp.
IP1000A LF-DS-R08
Bit
BIT Name
BIT Description
Type
HW
Reset
SW
Reset
LateCollisions reaches a value of 0xC0000000.
LateCollisions is enabled by writing a logic 1 to the
StatisticsEnable bit in the MACCtrl register, and a
logic 0 to the LateCollisions bit within the
StatisticsMask register.
3.2.1.16 MacControlFramesRcvd
Class............................. Ethernet MIB Statistics
I/O Base Address ......... IoBaseAddress register value
Memory Base Address . MemBaseAddress register value
Address Offset .............. 0xC6
Default Value ................ 0x0000
Access Rule.................. Word
Width ............................ 16 bits
Bit
BIT Name
BIT Description
Type
HW
Reset
SW
Reset
15..0
MacControl-
FramesRcvd
MAC Control Frames Received is a count of the
number of MAC control PAUSE frames, and only
PAUSE
frames,
received
successfully.
MacControlFramesRcvd will wrap around to zero
after reaching 0xFFFF.
An UpdateStats interrupt (UpdateStats bit within
the
IntStatus
register)
will
occur
when
MacControlFramesRcvd
reaches
a
value
of
0xC000. MacControlFramesRcvd is enabled by
writing a logic 1 to the StatisticsEnable bit in the
MACCtrl
register,
and
a
logic
0
to
the
MacControlFramesRcvd
bit
within
the
StatisticsMask register.
R/W
Vietnamese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
