S29GL01GS10DFIV13 datasheet(19/108 Pages) CYPRESS

tên linh kiện	S29GL01GS10DFIV13

Giải thích chi tiết về linh kiện	1-Gbit (128 Mbyte)/512-Mbit (64 Mbyte)/256-Mbit (32 Mbyte)/128-Mbit (16 Mbyte),3.0 V, GL-S Flash Memory

PDF	108 Pages

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nhà sản xuất	CYPRESS [Cypress Semiconductor]

Trang chủ	http://www.cypress.com

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19 / 108 page

Document Number: 001-98285 Rev. *R

Page 19 of 108

S29GL01GS/S29GL512S

S29GL256S/S29GL128S

Read Operations

4.1

Asynchronous Read

Each read access may be made to any location in the memory (random access). Each random access is self-timed with the same

latency from CE# or address to valid data (tACC or tCE).

4.2

Page Mode Read

Each random read accesses an entire 32-byte Page in parallel. Subsequent reads within the same Page have faster read access

speed. The Page is selected by the higher address bits (AMAX–A4), while the specific word of that page is selected by the least

significant address bits A3–A0. The higher address bits are kept constant and only A3–A0 changed to select a different word in the

same Page. This is an asynchronous access with data appearing on DQ15-DQ0 when CE# remains Low, OE# remains Low, and

the asynchronous Page access time (tPACC) is satisfied. If CE# goes High and returns Low for a subsequent access, a random read

access is performed and time is required (tACC or tCE).

S29GL01GS10DFIV13 bảng dữ liệu(PDF) 19 Page - Cypress Semiconductor