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AT42QT1060 [DATASHEET]

9505H–AT42–04/2015

3.5

Power Supply

See Section 7.2 on page 26 for the power supply range. If the power supply fluctuates slowly with temperature, the

device tracks and compensates for these changes automatically with only minor changes in sensitivity. If the supply

voltage drifts or shifts quickly, the drift compensation mechanism is not able to keep up, causing sensitivity

anomalies or false detections.

The usual power supply considerations with QT parts apply to the device. The power should be clean and come from

a separate regulator if possible. However, this device is designed to minimize the effects of unstable power, and

except in extreme conditions should not require a separate Low Dropout (LDO) regulator.

See underneath Figure 1-1 on page 4 for suggested regulator manufacturers.

It is assumed that a larger bypass capacitor (~1 µF) is somewhere else in the power circuit; for example, near the

regulator.

To assist with transient regulator stability problems, the QT1060 waits 500 µs any time it wakes up from a sleep state

(that is, in SLEEP and LP modes) before acquiring, to allow Vdd to fully stabilize.

3.6

Bus Specification

Caution: A regulator IC shared with other logic can result in erratic operation and is not

advised.

A single ceramic 0.1

µF bypass capacitor, with short traces, should be placed very close

to the power pins of the IC. Failure to do so can result in device oscillation, high current

consumption, erratic operation, and so on.

Table 3-1.

I2C Bus Specification

Parameter

Unit

Address space

7-bit

Maximum bus speed (SCL)

100 kHz

Hold time START condition

4 µs minimum

Setup time for STOP condition

4 µs minimum

Bus free time between a STOP and START condition

4.7 µs minimum

Rise times on SDA and SCL

1 µs maximum