32

AT42QT1060 [DATASHEET]

9505H–AT42–04/2015

A.3

START and STOP Conditions

The host initiates and terminates a data transmission. The transmission is initiated when the host issues a START

condition on the bus, and is terminated when the host issues a STOP condition. Between the START and STOP

conditions, the bus is considered busy. As shown in Figure A-3, START and STOP conditions are signaled by

changing the level of the SDA line when the SCL line is high.

Figure A-3.

START and STOP Conditions

A.4

Address Byte Format

All address bytes are 9 bits long, consisting of 7 address bits, one READ/WRITE control bit and an acknowledge bit.

If the READ/WRITE bit is set, a read operation is performed, otherwise a write operation is performed. When the

device recognizes that it is being addressed, it will acknowledge by pulling SDA low in the ninth SCL (ACK) cycle. An

address byte consisting of a slave address and a READ or a WRITE bit is called SLA+R or SLA+W, respectively.

The most significant bit of the address byte is transmitted first. The address sent by the host must be consistent with

that selected with the option jumpers.

Figure A-4.

Address Byte Format

SDA

SCL

START

STOP

Addr MSB

Addr LSB

R/W

ACK

SDA

SCL

START

12

78

9