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ADIN6310BBCZ bảng dữ liệu(PDF) 1 Page - Analog Devices |
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ADIN6310BBCZ bảng dữ liệu(HTML) 1 Page - Analog Devices |
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1 / 86 page ![]() Data Sheet ADIN3310/ADIN6310 Industrial Ethernet Time Sensitive Networking Switch Rev. A DOCUMENT FEEDBACK TECHNICAL SUPPORT Information furnished by Analog Devices is believed to be accurate and reliable "as is". However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. FEATURES ► Ethernet MAC interfaces: 10 Mb, 100 Mb or 1 Gb per port ► 6-port: 4x RMII/RGMII/SGMII and 2x RMII/RGMII ► 3-port: 2x RMII/RGMII/SGMII and 1x RMII/RGMII ► SGMII, 1000BASE-SX/1000BASE-LX/1000BASE-KX, and 100BASE-FX ► Low Latency, Layer 2 Ethernet switch ► Deterministic latency from port to port ► Cut-through or store and forward operation ► Traffic types and bridge delay per IEEE/IEC 60802 ► Standard bridging per IEEE 802.1Q-2018 (tailored) ► Each port is nonblocking and independent ► 32 kB frame buffer per transmit port ► 4096 VLANs ► Time synchronization ► IEEE 802.1AS-2020 ► IEEE 1588-2019 default profile ► IEEE C37.238-2017 energy profile2 ► 8 ns timestamp resolution ► Frames timestamped on ingress or egress ► IEEE 802.1Q time sensitive networking bridging ► Qbv: enhancements for scheduled traffic ► Qci: per stream filtering and policing ► Qbu: frame preemption ► Qch: cyclic queuing and forwarding ► Qav: forwarding and queuing enhancement2 ► Qcc: stream reservation protocol enhancements2 ► Number of streams ► 16000 TSN Layer 2 streams ► 256 extended lookup streams (IPV4, IPV6, PCP, and so on) ► PROFINET SendList control ► High availability and redundancy ► IEEE 802.1CB Frame Replication and Elimination for Reliability ► IEC62439-3:2016-03 HSR-/PRP-Compliant Protocol for Seamless Failover ► IEC62439-3-2021-12 Media Redundancy Protocol ► Custom Layer 2 on two ports for PROFINET IRT, EtherNet/IP beacon-based DLR, POWERLINK (100 Mbps)2 ► Packet assist engine offloads host and manages TSN and switch features ► Portable C drivers for TSN and industrial Ethernet protocols ► NETCONF support (driver to Sysrepo translation layer) ► Hardware root of trust based security features ► Secure boot, secure update with anti-rollback ► Hardware-based cryptography ► Secure host pairing Protocol ► Cryptographic authenticity checking ► Interfaces to external host processor ► RMII, RGMII, SGMII, SPI, dual SPI, or Quad SPI ► Power ► 3 external power supplies: 1.1 V, 3.3 V, and VDDIO_x (1.8 V, 2.5 V, or 3.3 V) ► Total chip power 60 mW per port at 1 Gbps, full utilization with VDDIO_B = 1.8 V ► Package and temperature range ► 256-ball CSP_BGA, 14 mm × 14 mm, 0.8 mm pitch ► 196-ball CSP_BGA, 12 mm × 12 mm, 0.8 mm pitch ► Temperature range −40°C to +85 or −40°C to 105°C APPLICATIONS ► Factory and process automation ► Motion control, robots, and cobots ► Energy automation ► Transportation ► Instrumentation ► Building automation GENERAL DESCRIPTION The ADIN3310 and ADIN6310 are 3-port and 6-port Gigabit Ether- net time sensitive networking (TSN) switches with integrated securi- ty primarily designed for industrial Ethernet applications. Each port can be configured to operate at different speeds. These switches have uncommitted media access controller (MAC) interfaces and can be paired with Analog Devices, Inc., physical (PHY) layer devices such as ADIN1100, ADIN1200, and ADIN1300, to form a low power, low latency system. Four serial gigabit media independ- ent interface (SGMII) and serializer/deserializer (serdes) interfaces allow backplane connections, connectivity to SFP modules and cascade switches. The switch supports the suite of IEEE 802.1Q time sensitive networking bridging features required by IEEE 60802 standard providing quality of service (QoS) for latency sensitive streams. The device also includes hardware capability to support parallel redundancy protocol (PRP) or high availability seamless redundancy (HSR) redundancy protocols, thereby offloading the host processor. 1 Standard not finalized. 2 Future software capability. |
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