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LE58QL022BVC bảng dữ liệu(PDF) 31 Page - Zarlink Semiconductor Inc

tên linh kiện LE58QL022BVC
Giải thích chi tiết về linh kiện  Quad Low Voltage Subscriber Line Audio-Processing Circuit VE580 Series
PDF  61 Pages
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nhà sản xuất  ZARLINK [Zarlink Semiconductor Inc]
Trang chủ  http://www.zarlink.com
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Le58QL022
Data Sheet
31
Zarlink Semiconductor Inc.
SIGNAL PROCESSING
Overview of Digital Filters
Several of the blocks in the signal processing section are user programmable. These allow the user to optimize the performance
of the QLSLAC device for the system. Figure 20 shows the QLSLAC device signal processing and indicates the programmable
blocks.
The advantages of digital filters are:
High reliability
No drift with time or temperature
Unit-to-unit repeatability
Superior transmission performance
Flexibility
n
Maximum possible bandwidth for V.90 modems
Figure 20.
QLSLAC Transmission Block Diagram
Two-Wire Impedance Matching
Two feedback paths on the QLSLAC device synthesize the two-wire input impedance of the SLIC by providing a programmable
feedback path from VIN to VOUT. The Analog Impedance Scaling Network (AISN) is a programmable analog gain of
−0.9375 • GIN to +0.9375 • GIN from V
IN to VOUT. (See GIN in Electrical Characteristics, on page 10.) The Z filter is a
programmable digital filter providing an additional path and programming flexibility over the AISN in modifying the transfer
function from VIN to VOUT. Together, the AISN and the Z-Filter enable the user to synthesize virtually all required SLIC input
impedances.
Frequency Response Correction and Equalization
The QLSLAC device contains programmable filters in the receive (R) and transmit (X) directions that may be programmed for
line equalization and to correct any attenuation distortion caused by the Z filter.
Transhybrid Balancing
The QLSLAC device’s programmable B filter is used to adjust transhybrid balance. The filter has a single pole IIR section (BIIR)
and an eight-tap FIR section (BFIR), both operating at 16 kHz. (See commands 86/87h and 96/97h.)
GIN
V
IN
AX
AISN
+
AR
ADC
DAC
Inter-
polator
Deci-
mator
+
Deci-
mator
Inter-
polator
Z
B
+
GX
X
LPF &
HPF
GR
R
LPF
Ex-
pander
TSA
TSA
Com-
pressor
High Pass Filter (HPF)
Full
Digital
Loopback
(FDL)
*
*
*
*
V
OUT
VREF
*
**
**
Lower Receive
Gain (LRG)
Cutoff Receive
Path (CRP)
TSA Loopback
(TLB)
Cutoff
Transmit
Path
(CTP)
Digital
TX
Digital
RX
1 kHz Tone
(TON)
0
* programmable blocks



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