DSP56F802 datasheet(19/40 Pages) FREESCALE

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Flash Memory Characteristics

56F802 Technical Data, Rev. 9

Freescale Semiconductor

•

Data Valid state, when a signal level has reached VOL or VOH

•

Data Invalid state, when a signal level is in transition between VOL and VOH

Figure 3-3 Signal States

3.4 Flash Memory Characteristics

Table 3-5 Flash Memory Truth Table

Mode

XE1

1. X address enable, all rows are disabled when XE = 0

YE2

2. Y address enable, YMUX is disabled when YE = 0

SE3

3. Sense amplifier enable

OE4

4. Output enable, tri-state Flash data out bus when OE = 0

PROG5

5. Defines program cycle

ERASE6

6. Defines erase cycle

MAS17

7. Defines mass erase cycle, erase whole block

NVSTR8

8. Defines non-volatile store cycle

Standby

Read

Word Program

Page Erase

Mass Erase

Table 3-6 IFREN Truth Table

Mode

IFREN = 1

IFREN = 0

Read

Read information block

Read main memory block

Word program

Program information block

Program main memory block

Page erase

Erase information block

Erase main memory block

Mass erase

Erase both blocks

Erase main memory block

Data Invalid State

Data1

Data2 Valid

Data

Tri-stated

Data3 Valid

Data2

Data3

Data1 Valid

Data Active

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