S32K311NHT0MPAST datasheet(116/143 Pages) NXP

116 / 143 page

12.10.2 uSDHC DDR electrical specifications

The following table describes the uSDHC electrical characteristics. Measurements are with maximum output load of

25pF, input transition of 1ns (20%/80%) and pad configured with DSE = 1'b1 and SRE = 1'b0. I/O operating voltage ranges from

2.97 V to 3.63 V. Valid pin combinations to be referred from K3xx*_Use sheet in IOmux.

Data transitions measured at 25%/62.5% at 3.3V for the write path. Data transitions measured at mid-supply for the read path.

Clock transitions measured at mid-supply.

Table 63. uSDHC DDR electrical specifications

Symbol

Description

Min

Typ

Max

Unit

Condition

Spec

Number

fpp

Clock frequency

(eMMC4.4/4.41

DDR) 1

—

MHz

Medium/Fast pad

SD1

tWL

Clock low time

—

Medium/Fast pad

—

tWH

Clock high time

—

Medium/Fast pad

—

tTLH

Clock rise time 1,2

—

Medium/Fast pad

—

tTHL

Clock fall time 1,2

—

Medium/Fast pad

—

tOD

SDHC output delay

(output valid) 1

2.7

—

6.53

SDHC_CLK to SDHC_

DAT

SD2

tOD

SDHC output delay

(output valid) 1

-5.6

—

2.6

SDHC_CLK to SDHC_

CMD

SD6

(See

SDR

figure)

tISU

SDHC Input setup

time

1.6

—

SDHC_DAT to SDHC_

CLK

SD3

tISU

SDHC Input setup

time

4.8

—

SDHC_CMD to SDHC_

CLK

SD7

(See

SDR

figure)

tIH

SDHC Input hold

time

1.5

—

SDHC_CLK to SDHC_

DAT

SD4

tIH

SDHC Input hold

time

1.5

—

SDHC_CLK to SDHC_

CMD

SD8

(See

SDR

figure)

1. Output timing valid for maximum external load CL = 25pF, which is assumed to be a 10pF load at the end of a 50Ohm,

un-terminated, 3.5 inch microstrip trace on standard FR4 (1.5pF/inch), (25pF total with margin).

2. The SDHC_CLK rise/fall time specification applies to the input clock transition required in order to meet the output delay

specifications. SDHC_CLK output transition time is dependent on output load and GPIO pad drive strength. See the GPIO

pad specifications for detail.

NXP Semiconductors

Communication interfaces

S32K3xx Data Sheet, Rev. 9.1, 03/2024

Data Sheet: Technical Data

Preliminary Information for S32K388

116 / 143

S32K311NHT0MPAST bảng dữ liệu(PDF) 116 Page - NXP Semiconductors

S32K311NHT0MPAST bảng dữ liệu(HTML) 116 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL