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S32K311NHT0MPAST bảng dữ liệu(PDF) 75 Page - NXP Semiconductors |
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S32K311NHT0MPAST bảng dữ liệu(HTML) 75 Page - NXP Semiconductors |
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75 / 143 page ![]() Table 31. Flash memory module life specifications (continued) Symbol Characteristic Conditions Min Typical Units Data retention Minimum data retention. Blocks with 0 - 1,000 P/E cycles. 20 — Years Blocks with 100,000 P/E cycles. 10 — Years 1. Program and erase supported for factory conditions. Nominal supply values and operation at 25°C. 9.3.1 Data retention vs program/erase cycles Graphically, Data Retention versus Program/Erase Cycles can be represented by the following figure. The spec window represents qualified limits. 0 P/E Cycles (Sector Erases) 5 1 10 15 20 25 10 100 1000 10000 100000 1000000 Figure 34. Data retention vs program/erase cycles 9.4 Flash memory AC timing specifications Table 32. Flash memory AC timing specifications Symbol Characteristic Min Typical Max Units tdone Time from 0 to 1 transition on the MCR[EHV] bit initiating a program/erase until the MCR[DONE] bit is cleared. — — 5 ns tdones Time from 1 to 0 transition on the MCR[EHV] bit aborting a program/erase until the MCR[DONE] bit is set to a 1. 5 plus four system clock periods — 22 plus four system clock periods1 µs tdrcv Time to recover once exiting low power mode. 14 plus seven system clock periods2 17.5 plus seven system clock periods 21 plus seven system clock periods µs Table continues on the next page... NXP Semiconductors Flash memory specification S32K3xx Data Sheet, Rev. 9.1, 03/2024 Data Sheet: Technical Data Preliminary Information for S32K388 75 / 143 |
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