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ADC3910CSSS bảng dữ liệu(PDF) 65 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  ADC3910Dx and ADC3910Sx 10-bit, 25 to 125-MSPS Low Latency, Low Power, Small, Single and Dual Channel ADC with Integrated Input Buffers
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ADC3910CSSS bảng dữ liệu(HTML) 65 Page - Texas Instruments

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6.6.1.36 OUTPUT_BIT_MAPPER_D2_D3 Register (Address = AFh) [Reset = EBh]
Return to the Summary Table.
Table 6-42. OUTPUT_BIT_MAPPER_D2_D3 Register Field Descriptions
Bit
Field
Type
Reset
Description
7:4
OUTPUT_BIT_MAPPER_
D3
R/W
Eh
These registers are used to reorder the output data bus. See the
Output Bit Mapper on how to program.
0100b = Lane 0 (LSB)
0101b = Lane 1
0110b = Lane 2
0111b = Lane 3
1000b = Lane 4
1001b = Lane 5
1010b = Lane 6
1011b = Lane 7
1100b = Lane 8
1101b = Lane 9
1110b = Lane 10
1111b = Lane 11 (MSB)
3:0
OUTPUT_BIT_MAPPER_
D2
R/W
Bh
These registers are used to reorder the output data bus. See the
Output Bit Mapper on how to program.
0100b = Lane 0 (LSB)
0101b = Lane 1
0110b = Lane 2
0111b = Lane 3
1000b = Lane 4
1001b = Lane 5
1010b = Lane 6
1011b = Lane 7
1100b = Lane 8
1101b = Lane 9
1110b = Lane 10
1111b = Lane 11 (MSB)
6.6.1.37 OUTPUT_BIT_MAPPER_D4_D5 Register (Address = B0h) [Reset = 84h]
Return to the Summary Table.
Table 6-43. OUTPUT_BIT_MAPPER_D4_D5 Register Field Descriptions
Bit
Field
Type
Reset
Description
7:4
OUTPUT_BIT_MAPPER_
D5
R/W
8h
These registers are used to reorder the output data bus. See the
Output Bit Mapper on how to program.
0100b = Lane 0 (LSB)
0101b = Lane 1
0110b = Lane 2
0111b = Lane 3
1000b = Lane 4
1001b = Lane 5
1010b = Lane 6
1011b = Lane 7
1100b = Lane 8
1101b = Lane 9
1110b = Lane 10
1111b = Lane 11 (MSB)
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ADC3910D125
SBASAD1 – DECEMBER 2023
Copyright © 2023 Texas Instruments Incorporated
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Product Folder Links: ADC3910D125



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