công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

Preview PDF HTML

AMC131M02DFMR bảng dữ liệu(PDF) 10 Page - Texas Instruments

tên linh kiện AMC131M02DFMR
Giải thích chi tiết về linh kiện  AMC131M02 2-Channel, 64-kSPS, Simultaneous-Sampling, 24-Bit, Reinforced Isolated Delta-Sigma ADC With Integrated DC/DC Converter
PDF  89 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  TI [Texas Instruments]
Trang chủ  http://www.ti.com
Logo TI - Texas Instruments

AMC131M02DFMR bảng dữ liệu(HTML) 10 Page - Texas Instruments

Back Button AMC131M02DFMR Datasheet HTML 6Page - Texas Instruments AMC131M02DFMR Datasheet HTML 7Page - Texas Instruments AMC131M02DFMR Datasheet HTML 8Page - Texas Instruments AMC131M02DFMR Datasheet HTML 9Page - Texas Instruments AMC131M02DFMR Datasheet HTML 10Page - Texas Instruments AMC131M02DFMR Datasheet HTML 11Page - Texas Instruments AMC131M02DFMR Datasheet HTML 12Page - Texas Instruments AMC131M02DFMR Datasheet HTML 13Page - Texas Instruments AMC131M02DFMR Datasheet HTML 14Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 10 / 89 page
background image
6.9 Timing Requirements
over operating ambient temperature range, DOUT load: 20 pF || 100 kΩ (unless otherwise noted)
MIN
MAX
UNIT
3.0 V ≤ DVDD ≤ 5.5 V
tw(CLL)
Pulse duration, CLKIN low
49
ns
tw(CLH)
Pulse duration, CLKIN high
49
ns
tc(SC)
SCLK period
40
ns
tw(SCL)
Pulse duration, SCLK low
20
ns
tw(SCH)
Pulse duration, SCLK high
20
ns
td(CSSC) Delay time, first SCLK rising edge after CS falling edge
16
ns
td(SCCS) Delay time, CS rising edge after final SCLK falling edge
10
ns
tw(CSH)
Pulse duration, CS high
15
ns
tsu(DI)
Setup time, DIN valid before SCLK falling egde
5
ns
th(DI)
Hold time, DIN valid after SCLK falling edge
8
ns
tw(SYL)
Pulse duration, SYNC/RESET low for synchronization
1
2047
tCLKIN
tw(RSL)
Pulse duration, SYNC/RESET low to generate device reset
2048
tCLKIN
tsu(SY)
Setup time, SYNC/RESET valid before CLKIN falling edge
10
ns
6.10 Switching Characteristics
over operating ambient temperature range, DOUT load: 20 pF || 100 kΩ (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
3.0 V ≤ DVDD ≤ 5.5 V
tp(CSDO)
Propagation delay time, CS falling edge to
DOUT driven
50
ns
tp(SCDO)
Progapation delay time, SCLK rising edge to
valid new DOUT
20
ns
tp(CSDOZ)
Propagation delay time, CS rising edge to DOUT
high impedance
75
ns
tw(DRH)
Pulse duration, DRDY high
4
tCLKIN
tw(DRL)
Pulse duration, DRDY low
4
tCLKIN
tPOR
Power-on-reset time
Measured from supplies at
90%
250
µs
SPI timeout
32768
tCLKIN
tREGACQ Register default acquisition time
5
µs
AMC131M02
SBASA56 – SEPTEMBER 2023
www.ti.com
10
Submit Document Feedback
Copyright © 2023 Texas Instruments Incorporated
Product Folder Links: AMC131M02



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com