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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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AT83SND2CMP3B bảng dữ liệu(PDF) 138 Page - ATMEL Corporation |
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AT83SND2CMP3B bảng dữ liệu(HTML) 138 Page - ATMEL Corporation |
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138 / 241 page  138 4341F–MP3–03/06 AT8xC51SND2C/MP3B Table 18-2. R1 Response Format (Normal Response) Table 18-3. R2 Response Format (CID and CSD registers) Table 18-4. R3 Response Format (OCR Register) Table 18-5. R4 Response Format (Fast I/O) Table 18-6. R5 Response Format 18.2.5 Data Packet Format There are 2 types of data packets: stream and block. As shown in Figure 18-8, stream data packets have an indeterminate length while block packets have a fixed length depending on the block length. Each data packet is preceded by a Start bit: a low level on MCMD line and suc- ceeded by an End bit: a high level on MCMD line. Due to the fact that there is no predefined end in stream packets, CRC protection is not included in this case. The CRC protection algorithm for block data is a 16-bit CCITT polynomial. Bit Position 47 46 45:40 39:8 7:1 0 Width (bits) 116 32 7 1 Value ‘0’ ‘0’ --- ‘1’ Description Start bit Transmission bit Command Index Card Status CRC7 End bit Bit Position 135 134 [133:128] [127:1] 0 Width (bits) 116 32 1 Value ‘0’ ‘0’ ‘111111’ - ‘1’ Description Start bit Transmission bit Reserved Argument End bit Bit Position 47 46 [45:40] [39:8] [7:1] 0 Width (bits) 11 6 32 7 1 Value ‘0’ ‘0’ ‘111111’ - ‘1111111’ ‘1’ Description Start bit Transmission bit Reserved OCR register Reserved End bit Bit Position 47 46 [45:40] [39:8] [7:1] 0 Width (bits) 11 6 32 7 1 Value ‘0’ ‘0’ ‘100111’ - - ‘1’ Description Start bit Transmission bit Command Index Argument CRC7 End bit Bit Position 47 46 [45:40] [39:8] [7:1] 0 Width (bits) 11 6 32 7 1 Value ‘0’ ‘0’ ‘101000’ - - ‘1’ Description Start bit Transmission bit Command Index Argument CRC7 End bit |
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