AT83SND2CMP3B datasheet(22/241 Pages) ATMEL

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4341F–MP3–03/06

AT8xC51SND2C/MP3B

6.6

Registers

Table 6-2.

AUXR1 Register

AUXR1 (S:A2h) – Auxiliary Register 1

Reset Value = XXXX 00X0b

Note:

1. ENBOOT bit is only available in AT89C51SND2C product.

6.7

Hardware Bytes

Table 6-3.

HSB Byte – Hardware Security Byte

543

210

ENBOOT

GF3

DPS

Bit Number

Bit

Mnemonic

Description

7 - 6

Reserved

The value read from these bits are indeterminate. Do not set these bits.

ENBOOT

Enable Boot Flash

Set this bit to map the boot Flash in the code space between at addresses F000h to

FFFFh.

Clear this bit to disable boot Flash.

Reserved

The value read from this bit is indeterminate. Do not set this bit.

3GF3

General Flag

This bit is a general-purpose user flag.

Always Zero

This bit is stuck to logic 0 to allow INC AUXR1 instruction without affecting GF3 flag.

Reserved for Data Pointer Extension.

0DPS

Data Pointer Select Bit

Set to select second data pointer: DPTR1.

Clear to select first data pointer: DPTR0.

543

210

X2B

BLJB

LB2

LB1

LB0

Bit Number

Bit

Mnemonic

Description

7X2B

(1)

X2 Bit

Program this bit to start in X2 mode.

Unprogram (erase) this bit to start in standard mode.

6BLJB(2)

Boot Loader Jump Bit

Program this bit to execute the boot loader at address F000h on next reset.

Unprogram (erase) this bit to execute user’s application at address 0000h on next reset.

5 - 4

Reserved

The value read from these bits is always unprogrammed. Do not program these bits.

Reserved

The value read from this bit is always unprogrammed. Do not program this bit.

2 - 0

LB2:0

Hardware Lock Bits

Refer to for bits description.

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