UPD6P9 datasheet(5/73 Pages) RENESAS

5 / 73 page

µPD67, 67A, 68, 68A, 69

Data Sheet U14935EJ2V1DS

LIST OF FUNCTIONS

Item

µPD67, 67A

µPD68, 68A

µPD69

µPD6P9

ROM capacity

1,002

× 10 bits

2,026

× 10 bits

4,074

× 10 bits

Mask ROM

One-time PROM

RAM capacity

× 4 bits

128

× 4 bits

Stack

1 level (multiplexed with RF of RAM)

I/O pins

• Key input (KI):

• Key I/O (KI/O):

• Key extended input (S0, S1, S2):

• Remote control transmission display output (LED): 1 (multiplexed with S1 pin)

Number of keys

• 32

• 56 (when extended by key extension input)

Clock frequency

Ceramic oscillation

•fX = 3.5 to 4.5 MHz

Instruction execution time

µs (@ fX = 4 MHz)

Carrier frequency

Each high-/low-level width can be set from 250 ns to 64

µs (@ fX = 4 MHz operation)

via modulo registers

TimerNote

9-bit programmable timer: 1 channel, timer clock: fX/64

POC circuit

On-chip

RAM retention detector

On-chip

Capacitor for oscillation (15 pF)

Mask option

Set to be used/

not used in device

Supply voltage

VDD = 2.0 to 3.6 V

VDD = 2.2 to 3.6 V

Operating ambient temperature

TA = –40 to +85

°C

Package

20-pin plastic SSOP (7.62 mm (300))

BLOCK DIAGRAM

KI0 to KI3

KI/O0 to KI/O7

S0, S1/LED, S2

Port KI

Port KI/O

Port S

ROM

RAM

System control

Carrier

generator

9-bit timer

CPU

core

XIN

XOUT

VDD

GND

REM

S1/LED

Note The timer output time differs between the

µPD67, 68, and 69 and the µPD67A and 68A. For details, refer

to 4 TIMER.

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