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MPC105EC/D bảng dữ liệu(PDF) 5 Page - NXP Semiconductors |
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MPC105EC/D bảng dữ liệu(HTML) 5 Page - NXP Semiconductors |
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5 / 24 page ![]() 105 Hardware Specifications 5 Preliminary/Subject to Change without Notice Table 4 provides the power dissipation for the MPC105. 1.3.2 AC Electrical Characteristics This section provides the clock AC electrical characteristics for the MPC105. 1.3.2.1 Input AC Specifications Table 5 provides the clock AC timing specifications as defined in Figure 1. These specifications are for operation between 16.67 and 33.33 MHz bus clock (SYSCLK) frequencies. Output low voltage, IOL = 14 mA VOL — 0.5 V Capacitance, Vin = 0 V, f = 1 MHz 1 Cin —7 pF Note: 1. Capacitance is periodically sampled rather than 100% tested. Table 4. Power Dissipation1 SYSCLK/Internal Clock Frequency (MHz) Power Management Mode 25/25 33.33/33.33 25/50 33.33/66.67 Unit Max Values (Vdd = 3.47 V) Full-on mode 0.60 0.8 1.30 1.70 W Doze mode TBD TBD TBD TBD mW Nap mode TBD TBD TBD TBD mW Sleep mode 2 140 180 220 260 mW Suspend mode 3 50 50 90 90 mW Typical Values (Vdd = 3.3 V) Full-on mode 0.40 0.50 0.70 0.90 W Doze mode TBD TBD TBD TBD mW Nap mode TBD TBD TBD TBD mW Sleep mode2 70 110 140 180 mW Suspend mode 3 30 30 60 60 mW Notes: 1. Power dissipation for common system configurations assuming 50 pF loads 2. Power saving modes assume system clock off. 3. Suspend power saving mode assumes system clock off and PLL in clock bypass mode. Table 3. DC Electrical Specifications (Continued) Vdd = 3.3 ± 5% Vdc, GND = 0 Vdc Characteristic Symbol Min Max Unit Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com AR CH IVE D B Y F RE ES CA LE SE MI CO ND UC TO R, INC . |
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