105 Hardware Specifications

17

Preliminary/Subject to Change without Notice

Interrupt, Clock, and Power Management Signals

CK0/DWE3

L11

High

Output

HRST

L16

Low

Input

MCP

J11

Low

Output

NMI

E15

High

Input

QACK

L14

Low

Output

QREQ

H16

Low

Input

SYSCLK

L6

Clock

Input

SUSPEND

H14

Low

Input

Test/Configuration Signals

FNR/DWE0

J13

High

Input

PLL0–PLL3

U11, T11, U12, T12

High

Input

TCK

F13

Clock

Input

TDI

B13

High

Input

TDO

E12

High

Output

TMS

D14

High

Input

TRST

H13

Low

Input

Power and Ground Signals

AVdd

K9

High

Clock

Power

Vdd

E10, E6, F11, F5, F7, G10, G12, G6, H5, H7,

K10, K7, L12, M11, M5, M7, N10, N12, N6,

P11, P5, P7, R10, R6, J8, L8

High

Power

LSSD_MODE 2

G11

Low

Input

Vss

E11, E7, F10, F12, F6, G5, G7, H12, H6, J7,

L7, M10, M12, M6, N11, N5, N7, P10, P12,

P6, R11, R7, K8, J9, L9

Low

Ground

NC

H8, H9, M8, M9

—

—

Note:

1. Some signals have dual functions and are shown more than once in this table.

2. This test signal is for factory use only. It must be pulled up to Vdd for normal machine

operation.

Table 9. Pinout Listing1 (Continued)

Signal Name

Pin Number

Active

I/O

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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