MPC105ECSLASHD datasheet(15/24 Pages) NXP

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Giải thích chi tiết về linh kiện	MPC105 PCI Bridge/Memory Controller Hardware Specifications

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105 Hardware Specifications

Preliminary/Subject to Change without Notice

PCI Interface Signals

C/BE0–C/BE3

D6, C8, C9, A6

Low

I/O

DEVSEL

Low

I/O

FLSHREQ

Low

Input

FRAME

A10

Low

I/O

IRDY

Low

I/O

ISA_MASTER

Low

Input

LOCK

Low

Input

MEMACK

Low

Output

AD0–AD31

D4, B14, C4, A14, D5, A13, C5, B12, C6,

A12, D7, B11, C7, A11, D8, B10, A8, D9, B8,

C10, A7, D10, B7, C11, D11, B6, C12, A5,

D12, B5, C13, A4

High

I/O

PAR

High

I/O

GNT

A15

Low

Input

REQ

Low

Output

PERR

Low

I/O

SERR

Low

I/O

STOP

Low

I/O

TRDY

Low

I/O

L2 Cache Interface Signals

ADS

Low

Output

BAA

Low

Output

DIRTY_IN

(BR1)

Low

Input

DIRTY_OUT

(BG1)

Low

Output

DOE

Low

Output

DWE0

(FNR)

J13

Low

Output

DWE (DWE1)

Low

Output

DWE2

Low

Output

Table 9. Pinout Listing1 (Continued)

Signal Name

Pin Number

Active

I/O

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

IVE

D B

Y F

INC

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