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STM32C011F6U6 bảng dữ liệu(PDF) 39 Page - STMicroelectronics |
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STM32C011F6U6 bảng dữ liệu(HTML) 39 Page - STMicroelectronics |
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39 / 94 page ![]() DS13866 Rev 3 39/94 STM32C011x4/x6 Electrical characteristics 79 5.3 Operating conditions 5.3.1 General operating conditions 5.3.2 Operating conditions at power-up / power-down The parameters given in Table 24 are derived from tests performed under the ambient temperature condition summarized in Table 23. 5.3.3 Embedded reset and power control block characteristics The parameters given in Table 25 are derived from tests performed under the ambient temperature conditions summarized in Table 23. Table 23. General operating conditions Symbol Parameter Conditions Min Max Unit VDD Standard operating voltage - 2.0(1) 3.6 V VIN I/O input voltage - -0.3 Min (VDD + 3.6, 5.5)(2) V fPCLK APB clock frequency - - 48 MHz TA Ambient temperature(3) Suffix 6(4) -40 85 °C Suffix 7(4) -40 105 Suffix 3(4) -40 125 TJ Junction temperature Suffix 6(4) -40 105 °C Suffix 7(4) -40 125 Suffix 3(4) -40 130 1. When RESET is released functionality is guaranteed down to VPDR min. 2. For operation with voltage higher than VDD +0.3 V, the internal pull-up and pull-down resistors must be disabled. 3. The TA(max) applies to PD(max). At PD < PD(max) the ambient temperature is allowed to go higher than TA(max) provided that the junction temperature TJ does not exceed TJ(max). Refer to Section 6.5: Thermal characteristics. 4. Temperature range digit in the order code. See Section 7: Ordering information. Table 24. Operating conditions at power-up / power-down Symbol Parameter Min Max Unit tVDD VDD rise time rate 0 ∞ µs/V VDD fall time rate 10 ∞ Table 25. Embedded reset and power control block characteristics Symbol Parameter Conditions Min Typ Max Unit tRSTTEMPO(1) POR temporization when VDD crosses VPOR VDD rising - 270 500 µs VPOR(1) Power-on reset threshold - 1.9 1.94 1.98 V VPDR(1) Power-down reset threshold - 1.88 1.92 1.96 V |
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