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L6364 bảng dữ liệu(PDF) 59 Page - STMicroelectronics |
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L6364 bảng dữ liệu(HTML) 59 Page - STMicroelectronics |
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59 / 60 page ![]() List of figures Figure 1. Block Diagram .................................................................... 3 Figure 2. Package and pin-out - QFN ........................................................... 4 Figure 3. Package and pin-out - CSP ........................................................... 4 Figure 4. Example of Wake-up sequence timing (VCQ = green plot; ICQ = red plot; VINT = Yellow) .................. 8 Figure 5. Register programming. ............................................................. 12 Figure 6. Single byte and sequential byte accesses ................................................ 13 Figure 7. IO-Link UART peripheral state machine .................................................. 17 Figure 8. Single octet UART mode state diagram .................................................. 21 Figure 9. Illustration of operation in transparent mode ............................................... 22 Figure 10. Wake-up time diagram.............................................................. 29 Figure 11. L6364 temperature measurement ...................................................... 33 Figure 12. L6364 thermal shutdown configuration................................................... 34 Figure 13. L6364 LED currents ............................................................... 35 Figure 14. Block diagram of DC-DC converter ..................................................... 37 Figure 15. Minimum supply voltage ............................................................ 38 Figure 16. Overcurrent operation .............................................................. 39 Figure 17. L6364 linear regulators' startup under different conditions of load capacitance ....................... 40 Figure 18. Example of thermal power dissipation estimation ........................................... 41 Figure 19. Surge waveform .................................................................. 42 Figure 20. Detailed block diagram, showing register field connections..................................... 46 Figure 21. Application example: DC-DC disabled, CQ and DIO coupled (Join Mode), VSENSOR = 5 V, VMCU = VDIG = 3.3 V .............................................................................. 47 Figure 22. Application example: DC-DC enabled, CQ and DIO coupled (Join Mode), VSENSOR = VMCU = VDIG = 5.0 V .. 47 Figure 23. Application example: DC-DC disabled, CQ as line driver, DIO as load driver, VSENSOR = 5.0 V, VMCU = VDIG = 3.3 V ............................................................................ 48 Figure 24. Application example: DC-DC enabled, CQ and DIO as independent line drivers, VSENSOR > 5.0 V, VMCU = VDIG = 5.0 V ......................................................................... 48 Figure 25. QFN20L mechanical drawings ........................................................ 49 Figure 26. QFN20L Suggested footprint ......................................................... 50 Figure 27. QFN20L, Packing information (drawing and dimension [mm]) ................................... 50 Figure 28. CSP19 Mechanical drawings ......................................................... 52 Figure 29. CSP19 Suggested footprint .......................................................... 53 Figure 30. CSP19, Packing Information (drawing and dimension [mm]) .................................... 53 L6364 List of figures DS13363 - Rev 4 page 59/60 |
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