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SH79F6488P/080PR bảng dữ liệu(HTML) 77 Page - SINOWEALTH Electronic Ltd

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SH79F6488/SH79F6489
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8.2.2 Super Low Power LCD (SLP LCD) Display Mode
The SLP LCD mode support 1/2/3/4COM duty .
The LCD module will work in SLP LCD Display Mode by Configuring the MOD[1:0] bits as ‘11’ in LCDCON register, and the
LCD module will switch to this mode without contrast adjustment automatically.
In this mode, the operation of FCCTL[1:0], DUTY, CONTR[2:0] bits will have no effect.
The SLP LCD clock source is 256Hz, and the frame frequency is 64Hz. Changing the value of SLPD[4:0] will adjust the SLP
LCD display effect.
The SLP LCD Display Mode control registers are described in the following Table.
Table 8.9 SLP LCD Control Register
AFH
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
PLCON
-
SLPDUTY1 SLPDUTY0
SLPD4
SLPD3
SLPD2
SLPD1
SLPD0
R/W
-
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
(POR/WDT/LVR/PIN)
-
0
0
0
0
0
0
0
Bit Number
Bit Mnemonic
Description
6-5
SLPDUTY[1:0]
LCD duty control
00: 1COM, LCD COM: COM1
01: 2COM, LCD COM: COM1-2
10: 3COM, LCD COM: COM1-3
11: 4COM, LCD COM: COM1-4
4-0
SLPD [4:0]
SLP LCD Duty select
SLP LCD clock source:
128
LCDCLK
F
pl =
Frame Frequency:
4
128
LCDCLK
F
frame
×
=
32
2
2
F
1
0]
:
SLPD[4
t1
pl
×
×
×
+
=
LCDCLK = 32KHz
COM1
COM2
COM3
COM4
SEGn
SEGn+1
COM4
COM3
COM2
COM1
SEGn+1
SEGn
2t1
t1
SLP LCD Mode Waveform



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