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SH32F2601P/032PR bảng dữ liệu(PDF) 11 Page - SINOWEALTH Electronic Ltd

tên linh kiện SH32F2601P/032PR
Giải thích chi tiết về linh kiện  32-bit High Performance Motor Control MCU Based on ARM® Star
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SH32F2601
11
7.3.1
Program Status Registers
The program status registers are subdivided into three status registers. These three registers are: application PSR
(APSR), interrupt PSR (IPSR), and execution PSR (EPSR). The three PSRs can be accessed together or separately using the
special register access instructions MSR and MRS. When they are accessed as a collective item, the name xPSR is used.
7.3.1.1
Application PSR
Application PSR (APSR) contains condition code flags. The ARM Star processor stores the condition code flags on the
stack before entering the exception. You can read the APSR using MRS instruction and can change the APSR using the MSR
instruction, but EPSR and IPSR are read-only.
b31
b30
b29
b28
b27
b26
b25
b24
b23
b22
b21
b20
b19
b18
b17
b16
N
Z
C
V
Q
Reserved
RW
RW
RW
RW
RW
-
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
b15
b14
b13
b12
b11
b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
Reserved
-
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
Sign
Description
31
N
Negative
1: the result is negative
0: the result is positive
30
Z
Zero
1: the result is 0
0: the result is not 0
29
C
Carry/borrow
1: carry or borrow
0: no carry or borrow
28
V
Overflow
1: overflow
0: no overflow
27
Q
DSP Overflow and Sticky saturation flag
26 - 0
Reserved
-



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