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STM32L4 bảng dữ liệu(PDF) 28 Page - STMicroelectronics |
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STM32L4 bảng dữ liệu(HTML) 28 Page - STMicroelectronics |
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28 / 33 page ![]() STM32L476/486 Versus STM32L4+ Series 27 STM32L4Rxxx/4Sxxx STM32L4P5xx/4Q5xx STM32L476/486 SYSCFG ANASWVDD bit: GPIO analog switch control voltage selection : - VDDA or booster - VDD I2C4 Fast-mode Plus driving capability activation NA Peripheral Summary PWR: New range 1 mode ( Normal mode/ Boost mode) LP Mode: STOP2 + SRAM3 ON/OFF PWR Standby + 64KB SRAM2 ON/OFF - Standby + 64KB SRAM2 ON/OFF - Standby + 4KB SRAM2 ON/OFF 1x SDMMC Data transfer up to 104 Mbyte/s for the 8- bit mode. 2x SDMMC Data transfer up to 104 Mbyte/s for the 8- bit mode. 1x SDMMC Data transfer up to 50 MHz for the 8- bit mode. DFSDM ( 8x Channels, 4x Filters) (DFSDM audio, beamforming, internal ADC inputs, new trigger source) DFSDM ( 4x Channels, 2x Filters) (DFSDM audio, beamforming, internal ADC inputs, new trigger source) DFSDM ( 8x Channels, 4x Filters) OTG_FS with clock recovery OTG_FS without clock recovery This slide continues the presentation of the key differences between STM32L476/786 devices and STM32L4+ Series devices – again the differences are highlighted in pink. 27 |
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