ADF4252BCPZ-R7 datasheet(4/30 Pages) AD

4 / 30 page

ADF4252

Data Sheet

Rev. E | Page 4 of 30

SPECIFICATIONS

VDD1 = VDD2 = VDD3 = DVDD = 3 V ± 10%, DVDD < VP1, VP2 < 5.5 V, GND = 0 V, RSET = 2.7 kΩ, dBm referred to 50 Ω, TA = TMIN to TMAX,

unless otherwise noted.

Table 1.

Parameter1

Min

Typ

Max

Unit

Test Conditions/Comments

RF CHARACTERISTICS

RF Input Frequency (RFINA, RFINB)2

0.25

3.0

GHz

RF Input Sensitivity

−10

dBm

RF Input Frequency (RFINA, RFINB)2

0.1

3.0

GHz

Input level = −8 dBm minimum,

0 dBm maximum

RF Phase Detector Frequency

MHz

Guaranteed by design

Allowable Prescaler Output Frequency

375

MHz

IF CHARACTERISTICS

IF Input Frequency (IFINA, IFINB)2

1200

MHz

IF Input Sensitivity

−10

dBm

IF Phase Detector Frequency

MHz

Guaranteed by design

Allowable Prescaler Output Frequency

150

MHz

REFERENCE CHARACTERISTICS

REFIN Input Frequency

250

MHz

For f < 10 MHz, use dc-coupled

square wave (0 V to VDD)

REFIN Input Sensitivity

0.5

VDD1

V p-p

AC-coupled; when dc-coupled, use

0 V to VDD max (CMOS-compatible)

REFIN Input Current

±100

μA

REFIN Input Capacitance

CHARGE PUMP

RF ICP Sink/Source

See Figure 37

High Value

4.375

Low Value

625

μA

IF ICP Sink/Source

See Figure 41

High Value

Low Value

625

μA

ICP Three-State Leakage Current

RF Sink and Source Current Matching

0.5 V < VCP < VP − 0.5

RSET Range

1.5

2.7

5.6

kΩ

See Figure 37

IF Sink and Source Current Matching

ICP vs. VCP

0.5 V < VCP < VP − 0.5

ICP vs. Temperature

VCP = VP/2

LOGIC INPUTS

VINH, Input High Voltage

1.35

VINL, Input Low Voltage

0.6

IINH/IINL, Input Current

±1

μA

CIN Input Capacitance

LOGIC OUTPUTS

VOH, Output High Voltage

VDD − 0.4

IOH = 0.2 mA

VOL, Output Low Voltage

0.4

IOL = 0.2 mA

ADF4252BCPZ-R7 bảng dữ liệu(PDF) 4 Page - Analog Devices

ADF4252BCPZ-R7 bảng dữ liệu(HTML) 4 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

bảng dữ liệu tải về

Link URL