STM32WB10CC datasheet(42/110 Pages) STMICROELECTRONICS

42 / 110 page

Functional overview

STM32WB10CC

42/110

DS13259 Rev 2

3.20

Universal synchronous/asynchronous receiver transmitter

(USART)

The device embeds one universal synchronous receiver transmitter.

This interface provides asynchronous communication, IrDA SIR ENDEC support,

multiprocessor communication mode, single-wire half-duplex communication mode and has

LIN Master/Slave capability. It provides hardware management of the CTS and RTS signals,

and RS485 driver enable.

The USART is able to communicate at speeds of up to 4 Mbit/s, and also provides Smart

Card mode (ISO 7816 compliant) and SPI-like communication capability.

The USART supports synchronous operation (SPI mode), and can be used as an SPI

master.

The USART has a clock domain independent from the CPU clock, allowing it to wake up the

MCU from Stop mode using baudrates up to 200 kbaud. The wake up events from Stop

mode are programmable and can be:



the start bit detection



any received data frame



a specific programmed data frame.

The USART interface can be served by the DMA controller.

3.21

Serial peripheral interface (SPI1)

The SPI interface enable communication up to 32 Mbit/s in master and up to 24 Mbit/s in

slave modes, in half-duplex, full-duplex and simplex modes. The 3-bit prescaler gives 8

master mode frequencies and the frame size is configurable from 4 bits to 16 bits. The SPI

interface support NSS pulse mode, TI mode and Hardware CRC calculation.

The SPI interface can be served by the DMA controller.

Table 12. I2C implementation

I2C features(1)

1. X: supported.

I2C1

Standard-mode (up to 100 kbit/s)

Fast-mode (up to 400 kbit/s)

Fast-mode Plus with 20mA output drive I/Os (up to 1 Mbit/s)

Programmable analog and digital noise filters

SMBus/PMBus hardware support

Independent clock

Wakeup from Stop 0 / Stop 1 mode on address match

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