STM32WB10CC datasheet(92/110 Pages) STMICROELECTRONICS

tên linh kiện	STM32WB10CC

Giải thích chi tiết về linh kiện	Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M4 with FPU, Bluetooth® 5.2 radio solution

PDF	110 Pages

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Electrical characteristics

STM32WB10CC

92/110

DS13259 Rev 2

tLATR

Trigger conversion

latency

CKMODE = 00

1 / fADC

CKMODE = 01

6.5

CKMODE = 10

12.5

CKMODE = 11

3.5

Sampling time

fADC = 35 MHz

0.043

4.59

µs

1.5

160.5

1 / fADC

tADCVREG_STUP

ADC voltage regulator

start-up time

µs

tCONV

Total conversion time



(including sampling time)

fADC = 35 MHz

Resolution = 12 bits

0.40

4.95

µs

Resolution = 12 bits

ts + 12.5 cycles for successive

approximations = 14 to 173

1 / fADC

IDDA(ADC)

ADC consumption from

the VDDA supply

fs = 2.5 Msps

475

µA

fs = 1 Msps

190

fs = 10 ksps

17.3

1. Specified by design, not tested in production

2. The I/O analog switch voltage booster is enabled when VDDA < 2.4 V (BOOSTEN = 1 in the SYSCFG_CFGR1 when

VDDA < 2.4V). It is disable when VDDA ≥ 2.4 V.

VREF+ is internally connected to VDDA and VREF- is internally connected to VSS.

Table 66. ADC characteristics(1) (2) (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Table 67. Maximum ADC RAIN values

Resolution

Sampling cycle at 35 MHz (ns)

Sampling time at 35 MHz (ns)

Max. RAIN(1)(2)(Ω)

12 bits

1.5

3.5

100

680

7.5

214

2200

12.5

357

4700

19.5

557

8200

39.5

1129

15000

79.5

2271

33000

160.5

4586

50000

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