P87LPC779FDH datasheet(20/74 Pages) PHILIPS

20 / 74 page

Philips Semiconductors

P87LPC779

CMOS single-chip 8-bit microcontroller

Product data

Rev. 02 — 03 May 2004

20 of 74

9397 750 13213

8.6.3

Comparator interrupt

Each comparator has an interrupt ﬂag CMFn contained in its conﬁguration register.

This ﬂag is set whenever the comparator output changes state. The ﬂag may be

polled by software or may be used to generate an interrupt. The interrupt will be

generated when the corresponding enable bit ECn in the IEN1 register is set and the

interrupt system is enabled via the EA bit in the IEN0 register.

8.6.4

Comparators and power reduction modes

Either or both comparators may remain enabled when Power-down or Idle mode is

activated. The comparators will continue to function in the power reduction mode. If a

comparator interrupt is enabled, a change of the comparator output state will

generate an interrupt and wake up the processor. If the comparator output to a pin is

enabled, the pin should be conﬁgured in the push-pull mode in order to obtain fast

switching times while in Power-down mode. The reason is that with the oscillator

stopped, the temporary strong pull-up that normally occurs during switching on a

quasi-bidirectional port pin does not take place.

Comparators consume power in Power-down and Idle modes, as well as in the

normal operating mode. This fact should be taken into account when system power

consumption is an issue.

8.6.5

Comparator conﬁguration example

The code shown below is an example of initializing one comparator. Comparator 1 is

conﬁgured to use the CIN1A and CMPREF inputs, outputs the comparator result to

the CMP1 pin, and generates an interrupt when the comparator output changes.

CmpInit: b

mov

PT0AD,#30h

; Disable digital inputs on pins that are used

;

for analog functions: CIN1A, CMPREF.

anl

P0M2,#0cfh

; Disable digital outputs on pins that are used

orl

P0M1,#30h

;

for analog functions: CIN1A, CMPREF.

mov

CMP1,#24h

; Turn on comparator 1 and set up for:

;

- Positive input on CIN1A.

;

- Negative input from CMPREF pin.

;

- Output to CMP1 pin enabled.

call

delay10us

; The comparator has to start up for at

;

least 10 microseconds before use.

anl

CMP1,#0feh

; Clear comparator 1 interrupt flag.

setb

EC1

; Enable the comparator 1 interrupt. The

;

priority is left at the current value.

setb

; Enable the interrupt system (if needed).

ret

; Return to caller.

The interrupt routine used for the comparator must clear the interrupt ﬂag (CMF1 in

this case) before returning.

8.7 I2C-bus serial interface

The I2C-bus uses two wires (SDA and SCL) to transfer information between devices

connected to the bus. The main features of the bus are:

• Bidirectional data transfer between masters and slaves.

• Serial addressing of slaves (no added wiring).

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