P87LPC779FDH datasheet(42/74 Pages) PHILIPS

42 / 74 page

Philips Semiconductors

P87LPC779

CMOS single-chip 8-bit microcontroller

Product data

Rev. 02 — 03 May 2004

42 of 74

9397 750 13213

8.14.1

Mode 0

Putting either Timer into Mode 0 makes it look like an 8048 Timer, which is an 8-bit

Counter with a divide-by-32 prescaler. Figure 19 shows Mode 0 operation.

In this mode, the Timer register is conﬁgured as a 13-bit register. As the count rolls

over from all 1s to all 0s, it sets the Timer interrupt ﬂag TFn. The count input is

enabled to the Timer when TRn = 1 and either GATE = 0 or INTn = 1. (Setting

GATE = 1 allows the Timer to be controlled by external input INTn, to facilitate pulse

width measurements). TRn is a control bit in the Special Function Register TCON

(Tables 34 and 35). The GATE bit is in the TMOD register.

The 13-bit register consists of all 8 bits of THn and the lower 5 bits of TLn. The upper

3 bits of TLn are indeterminate and should be ignored. Setting the run ﬂag (TRn)

does not clear the registers.

Mode 0 operation is the same for Timer0 and Timer1. See Figure 19. There are two

different GATE bits, one for Timer1 (TMOD.7) and one for Timer0 (TMOD.3).

Table 31:

TMOD - Timer/counter mode control register (address 89H) bit allocation

Not bit addressable; Reset value: 00H

Bit

Symbol

GATE

C/TM1

GATE

C/TM1

Table 32:

TMOD - Timer/counter mode control register (address 89H) bit description

Bit

Symbol

Description

GATE

Gating control for Timer1. When set, Timer/Counter is enabled

only while the INT1 pin is high and the TR1 control pin is set.

When cleared, Timer1 is enabled when the TR1 control bit is set.

6C/T

Timer or Counter Selector for Timer1. Cleared for Timer operation

(input from internal system clock.) Set for Counter operation (input

from T1 input pin).

5, 4

M1, M0

Mode select for Timer1 (see table below).

GATE

Gating control for Timer0. When set, Timer/Counter is enabled

only while the INT0 pin is high and the TR0 control pin is set.

When cleared, Timer0 is enabled when the TR0 control bit is set.

2C/T

Timer or Counter Selector for Timer0. Cleared for Timer operation

(input from internal system clock.) Set for Counter operation (input

from T0 input pin).

1, 0

M1, M0

Mode Select for Timer0 (see Table 33 below).

Table 33:

M1, M0 timer mode

M1, M0

Timer mode

0 0

8048 Timer ‘TLn’ serves as 5-bit prescaler.

0 1

16-bit Timer/Counter ‘THn’ and ‘TLn’ are cascaded; there is no prescaler.

1 0

8-bit auto-reload Timer/Counter. THn holds a value which is loaded into

TLn when it overﬂows.

1 1

Timer0 is a dual 8-bit Timer/Counter in this mode. TL0 is an 8-bit

Timer/Counter controlled by the standard Timer0 control bits. TH0 is an

8-bit timer only, controlled by the Timer1 control bits (see text). Timer1 in

this mode is stopped.

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