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P87LPC779FDH bảng dữ liệu(PDF) 60 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  CMOS single-chip 8-bit 80C51 microcontroller with 128-byte data RAM, 8 kB OTP
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Philips Semiconductors
P87LPC779
CMOS single-chip 8-bit microcontroller
Product data
Rev. 02 — 03 May 2004
60 of 74
9397 750 13213
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.17 Additional features
The AUXR1 register contains several special purpose control bits that relate to
several chip features. AUXR1 is described in Tables 46 and 47.
Table 45:
Watchdog rate select clock time
WDS2-0
Timeout clocks
Minimum time
Nominal time
Maximum time
0 0 0
8,192
10 ms
16 ms
23 ms
0 0 1
16,384
20 ms
32 ms
45 ms
0 1 0
32,768
41 ms
65 ms
90 ms
0 1 1
65,536
82 ms
131 ms
180 ms
1 0 0
131,072
165 ms
262 ms
360 ms
1 0 1
262,144
330 ms
524 ms
719 ms
1 1 0
524,288
660 ms
1.05 sec
1.44 sec
1 1 1
1,048,576
1.3 sec
2.1 sec
2.9 sec
Table 46:
AUXR1 - AUXR1 register (address A2H) bit allocation
Not bit addressable; Reset value: 00H
Bit
7
6
5
4
3
2
1
0
Symbol
KBF
BOD
BOI
LPEP
SRST
0
-
DPS
Table 47:
AUXR1 - AUXR1 register (address A2H) bit description
Bit
Symbol
Description
7
KBF
Keyboard Interrupt Flag. Set when any pin of port 0 that is enabled
for the Keyboard Interrupt function goes LOW. Must be cleared by
software.
6
BOD
Brown Out Disable. When set, turns off brownout detection and
saves power. See Section 8.11 “Power monitoring functions” on
page 37 for details.
5
BOI
Brown Out Interrupt. When set, prevents brownout detection from
causing a chip reset and allows the brownout detect function to be
used as an interrupt. See Section 8.11 “Power monitoring
functions” on page 37 for details.
4
LPEP
Low Power EPROM control bit. Allows power savings in low
voltage systems. Set by software. Can only be cleared by
Power-on or brownout reset. See Section 8.12 “Power reduction
modes” on page 38 for details.
3
SRST
Software Reset. When set by software, resets the P87LPC779 as
if a hardware reset occurred.
2
0
This bit contains a hard-wired 0. Allows toggling of the DPS bit by
incrementing AUXR1, without interfering with other bits in the
register.
1
-
Reserved for future use. Should not be set to ‘1’ by user programs.
0
DPS
Data Pointer Select. Chooses one of two Data Pointers for use by
the program. See text for details.



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