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PRT2011CVL4A bảng dữ liệu(PDF) 1 Page - NXP Semiconductors |
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PRT2011CVL4A bảng dữ liệu(HTML) 1 Page - NXP Semiconductors |
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1 / 113 page ![]() NXP Semiconductors Data Sheet: Technical Data Document Number: IMXRT1064IEC Rev. 2, 08/2020 MIMXRT1064CVL5A MIMXRT1064CVL5B MIMXRT1064CVJ5A MIMXRT1064CVJ5B Package Information Plastic Package 196-pin MAPBGA, 10 x 10 mm, 0.65 mm pitch 196-pin MAPBGA, 12 x 12 mm, 0.8 mm pitch Ordering Information See Table 1 on page 7 NXP reserves the right to change the production detail specifications as may be required to permit improvements in the design of its products. 1 i.MX RT1064 Introduction The i.MX RT1064 is a new processor family featuring NXP’s advanced implementation of the Arm Cortex®-M7 core, which operates at speeds up to 528 MHz to provide high CPU performance and best real-time response. The i.MX RT1064 processor has 4 MB on chip Flash and 1 MB on-chip RAM. 512 KB SRAM can be flexibly configured as TCM or general-purpose on-chip RAM, while the other 512 KB SRAM is general-purpose on-chip RAM. The i.MX RT1064 integrates advanced power management module with DCDC and LDO that reduces complexity of external power supply and simplifies power sequencing. The i.MX RT1064 also provides various memory interfaces, including SDRAM, RAW NAND FLASH, NOR FLASH, SD/eMMC, Quad SPI, and a wide range of other interfaces for connecting peripherals, such as WLAN, Bluetooth™, GPS, displays, and camera sensors. The i.MX RT1064 has rich audio and video features, including LCD display, basic 2D graphics, camera interface, SPDIF, and I2S audio i.MX RT1064 Crossover Processors for Industrial Products 1. i.MX RT1064 Introduction . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1.2. Ordering information . . . . . . . . . . . . . . . . . . . . . . . 6 2. Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3. Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.1. Special signal considerations . . . . . . . . . . . . . . . 17 3.2. Recommended connections for unused analog interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 20 4.1. Chip-Level conditions . . . . . . . . . . . . . . . . . . . . . 20 4.2. System power and clocks . . . . . . . . . . . . . . . . . . 27 4.3. I/O parameters . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4.4. System modules . . . . . . . . . . . . . . . . . . . . . . . . . 39 4.5. External memory interface . . . . . . . . . . . . . . . . . 44 4.6. Display and graphics . . . . . . . . . . . . . . . . . . . . . . 54 4.7. Audio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 4.8. Analog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 4.9. Communication interfaces . . . . . . . . . . . . . . . . . . 67 4.10. Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 5. Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 6. Boot mode configuration . . . . . . . . . . . . . . . . . . . . . . . . 83 6.1. Boot mode configuration pins . . . . . . . . . . . . . . . 83 6.2. Boot device interface allocation . . . . . . . . . . . . . . 83 7. Package information and contact assignments . . . . . . . 88 7.1. 10 x 10 mm package information . . . . . . . . . . . . 88 7.2. 12 x 12 mm package information . . . . . . . . . . . 100 8. Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112 |
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