ATMEGA640 datasheet(282/436 Pages) MICROCHIP

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ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET]

DS40002211A

• Bit 5 – ADLAR: ADC Left Adjust Result

The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register. Write one to

ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the ADLAR bit will affect the ADC

Data Register immediately, regardless of any ongoing conversions. For a complete description of this bit, see

“ADCL and ADCH – The ADC Data Register” on page 286.

• Bits 4:0 – MUX4:0: Analog Channel and Gain Selection Bits

The value of these bits selects which combination of analog inputs are connected to the ADC. See Table 26-4 for

details. If these bits are changed during a conversion, the change will not go in effect until this conversion is

complete (ADIF in ADCSRA is set).

26.8.2

ADCSRB – ADC Control and Status Register B

• Bit 3 – MUX5: Analog Channel and Gain Selection Bit

This bit is used together with MUX4:0 in ADMUX to select which combination in of analog inputs are connected to

the ADC. See Table 26-4 for details. If this bit is changed during a conversion, the change will not go in effect until

this conversion is complete.

This bit is not valid for ATmega1281/2561.

Bit

76543210

(0x7B)

–

ACME

–

–MUX5

ADTS2

ADTS1

ADTS0

ADCSRB

Read/Write

R/W

Initial Value

00000000

Table 26-4.

Input Channel Selections

MUX5:0

Single Ended Input

Positive Differential Input

Negative Differential Input

Gain

000000

ADC0

N/A

000001

ADC1

000010

ADC2

000011

ADC3

000100

ADC4

000101

ADC5

000110

ADC6

000111

ADC7

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