ATMEGA640 datasheet(36/436 Pages) MICROCHIP

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ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET]

DS40002211A

The user should poll the EEPE bit before starting the read operation. If a write operation is in progress, it is neither

possible to read the EEPROM, nor to change the EEAR Register.

9.3

General Purpose registers

9.3.1

GPIOR2 – General Purpose I/O Register 2

9.3.2

GPIOR1 – General Purpose I/O Register 1

9.3.3

GPIOR0 – General Purpose I/O Register 0

9.4

External Memory registers

9.4.1

XMCRA – External Memory Control Register A

• Bit 7 – SRE: External SRAM/XMEM Enable

Writing SRE to one enables the External Memory Interface.The pin functions AD7:0, A15:8, ALE, WR, and RD are

activated as the alternate pin functions. The SRE bit overrides any pin direction settings in the respective data

direction registers. Writing SRE to zero, disables the External Memory Interface and the normal pin and data direc-

tion settings are used.

• Bit 6:4 – SRL2:0: Wait-state Sector Limit

It is possible to configure different wait-states for different External Memory addresses. The external memory

address space can be divided in two sectors that have separate wait-state bits. The SRL2, SRL1, and SRL0 bits

select the split of the sectors, see Table 9-2 on page 37 and Figure 9-1 on page 27. By default, the SRL2, SRL1,

and SRL0 bits are set to zero and the entire external memory address space is treated as one sector. When the

entire SRAM address space is configured as one sector, the wait-states are configured by the SRW11 and SRW10

bits.

Bit

765

43210

0x2B (0x4B)

MSB

LSB

GPIOR2

Read/Write

R/W

Initial Value

000

00000

Bit

76543210

0x2A (0x4A)

MSB

LSB

GPIOR1

Read/Write

R/W

Initial Value

00000000

Bit

765

43210

0x1E (0x3E)

MSB

LSB

GPIOR0

Read/Write

R/W

Initial Value

000

00000

Bit

76543

210

“(0x74)”

SRE

SRL2

SRL1

SRL0

SRW11

SRW10

SRW01

SRW00

XMCRA

Read/Write

R/W

Initial Value

00000

000

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