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ATMEGA640 bảng dữ liệu(PDF) 54 Page - Microchip Technology

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ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET]
DS40002211A
11.10 Register Description
11.10.1
SMCR – Sleep Mode Control Register
The Sleep Mode Control Register contains control bits for power management.
• Bits 3, 2, 1 – SM2:0: Sleep Mode Select Bits 2, 1, and 0
These bits select between the five available sleep modes as shown in Table 11-2.
Note:
1. Standby modes are only recommended for use with external crystals or resonators.
• Bit 1 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP instruction is exe-
cuted. To avoid the MCU entering the sleep mode unless it is the programmer’s purpose, it is recommended to
write the Sleep Enable (SE) bit to one just before the execution of the SLEEP instruction and to clear it immediately
after waking up.
Bit
76543
210
0x33 (0x53)
––––
SM2
SM1
SM0
SE
SMCR
Read/Write
RRRR
R/W
R/W
R/W
R/W
Initial Value
00000
000
Table 11-2.
Sleep Mode Select
SM2
SM1
SM0
Sleep Mode
000
Idle
0
0
1
ADC Noise Reduction
010
Power-down
011
Power-save
100
Reserved
101
Reserved
1
1
0
Standby(1)
1
1
1
Extended Standby(1)



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