AM6421 datasheet(173/237 Pages) TI

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SPI_CS[i]

(IN)

SPI_SCLK

(IN)

SPI_SCLK

(IN)

SPI_D[x]

(OUT)

SPI_CS[i]

(IN)

SPI_SCLK

(IN)

SPI_SCLK

(IN)

SPI_D[x]

(OUT)

Bit n-1

Bit n-2

Bit n-3

Bit n-4

Bit 0

Bit n-1

Bit n-2

Bit n-3

Bit 1

Bit 0

PHA=0

EPOL=1

POL=0

POL=1

POL=0

POL=1

PHA=1

EPOL=1

SS6

SS3

SS1

SS3

SS1

SS3

SS1

SS2

SS1

SS6

SS8

SS9

SS7

SS8

SS2

SS3

SS2

SS6

SS9

SPRSP08_TIMING_McSPI_03

Figure 7-56. SPI Slave Mode Transmit Timing

7.10.5.12 MMCSD

The MMCSD Host Controller provides an interface to embedded Multi-Media Card (MMC), Secure Digital (SD),

and Secure Digital IO (SDIO) devices. The MMCSD Host Controller deals with MMC/SD/SDIO protocol at

transmission level, data packing, adding cyclic redundancy checks (CRCs), start/end bit insertion, and checking

for syntactical correctness.

For more details about MMCSD interfaces, see the corresponding MMC0 and MMC1 sections within Section 6.3,

Signal Descriptions and Section 8, Detailed Description.

Note

Some operating modes require software configuration of the MMC DLL delay settings, as shown in

Table 7-55 and Table 7-64.

For more information, see Multi-Media Card/Secure Digital (MMCSD) Interface section in Peripherals chapter in

the device TRM.

7.10.5.12.1 MMC0 - eMMC Interface

MMC0 interface is compliant with the JEDEC eMMC electrical standard v5.1 (JESD84-B51) and it supports the

following eMMC applications:

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AM6442, AM6441, AM6421

AM6412, AM6411

SPRSP56 – JANUARY 2021

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Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411

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