AM6421 datasheet(169/237 Pages) TI

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7.10.5.11 MCSPI

For more details about features and additional description information on the device Serial Port Interface, see

the corresponding sections within Section 6.3, Signal Descriptions and Section 8, Detailed Description.

Table 7-50 presents timing conditions for MCSPI.

For more information, see Multichannel Serial Peripheral Interface (MCSPI) section in Peripherals chapter in the

device TRM.

Table 7-50. MCSPI Timing Conditions

PARAMETER

MIN

MAX

UNIT

INPUT CONDITIONS

SRI

Input slew rate

8.5

V/ns

OUTPUT CONDITIONS

Output load capacitance

7.10.5.11.1 MCSPI — Master Mode

Table 7-51, Figure 7-53, Table 7-52, and Figure 7-54 present timing requirements and switching characteristics

for SPI – Master Mode.

Table 7-51. MCSPI Timing Requirements – Master Mode

see Figure 7-53

NO.

PARAMETER

DESCRIPTION

MIN

MAX

UNIT

SM4

tsu(MISO-SPICLK)

Setup time, SPIn_D[x] valid before SPIn_CLK active edge

2.8

SM5

th(SPICLK-MISO)

Hold time, SPIn_D[x] valid after SPIn_CLK active edge

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