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STM32G031F6 bảng dữ liệu(PDF) 57 Page - STMicroelectronics |
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STM32G031F6 bảng dữ liệu(HTML) 57 Page - STMicroelectronics |
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57 / 117 page ![]() DS12992 Rev 2 57/117 STM32G031x4/x6/x8 Electrical characteristics 92 5.3.6 Wakeup time from low-power modes and voltage scaling transition times The wakeup times given in Table 34 are the latency between the event and the execution of the first user instruction. I2C1 APB 3.2 2.7 3.0 I2C2 APB 0.7 0.6 1.0 SPI1 APB 2.2 1.8 2.0 SPI2 APB 1.3 1.1 1.5 USART1 APB 6.6 5.6 6.0 USART2 APB 1.8 1.5 2.0 LPUART1 APB 4.3 3.5 4.0 ADC APB 1.6 1.5 1.5 1. The AHB to APB Bridge is automatically active when at least one peripheral is ON on the APB. Table 33. Current consumption of peripherals (continued) Peripheral Bus Consumption in µA/MHz Range 1 Range 2 Low-power run and sleep Table 34. Low-power mode wakeup times(1) Symbol Parameter Conditions Typ Max Unit tWUSLEEP Wakeup time from Sleep to Run mode -11 11 CPU cycles tWULPSLEEP Wakeup time from Low-power sleep mode Transiting to Low-power-run-mode execution in Flash memory not powered in Low-power sleep mode; HCLK = HSI16 / 8 = 2 MHz 11 14 tWUSTOP0 Wakeup time from Stop 0 Transiting to Run-mode execution in Flash memory not powered in Stop 0 mode; HCLK = HSI16 = 16 MHz; Regulator in Range 1 or Range 2 5.6 6 µs Transiting to Run-mode execution in SRAM or in Flash memory powered in Stop 0 mode; HCLK = HSI16 = 16 MHz; Regulator in Range 1 or Range 2 22.4 |
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