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ADSP-SC571KSWZ-4 bảng dữ liệu(PDF) 39 Page - Analog Devices |
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ADSP-SC571KSWZ-4 bảng dữ liệu(HTML) 39 Page - Analog Devices |
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39 / 142 page  Rev. B | Page 39 of 142 | June 2018 ADSP-SC570/SC571/SC572/SC573/ADSP-21571/21573 DAI0_PIN15 DAI0 Pin 15 Not Muxed DAI0_PIN15 DAI0_PIN16 DAI0 Pin 16 Not Muxed DAI0_PIN16 DAI0_PIN17 DAI0 Pin 17 Not Muxed DAI0_PIN17 DAI0_PIN18 DAI0 Pin 18 Not Muxed DAI0_PIN18 DAI0_PIN19 DAI0 Pin 19 Not Muxed DAI0_PIN19 DAI0_PIN20 DAI0 Pin 20 Not Muxed DAI0_PIN20 ETH0_COL EMAC0 MII Collision detect C PC_06 ETH0_CRS EMAC0 Carrier Sense/RMII Receive Data Valid B PB_01 ETH0_MDC EMAC0 Management Channel Clock A PA_11 ETH0_MDIO EMAC0 Management Channel Serial Data A PA_10 ETH0_PTPAUXIN0 EMAC0 PTP Auxiliary Trigger Input 0 D PD_14 ETH0_PTPAUXIN1 EMAC0 PTP Auxiliary Trigger Input 1 D PD_15 ETH0_PTPPPS0 EMAC0 PTP Pulse Per Second Output 0 A PA_09 ETH0_PTPPPS1 EMAC0 PTP Pulse Per Second Output 1 D PD_08 ETH0_RXCLK_REFCLK EMAC0 RXCLK (10/100/1000) or REFCLK (10/100) B PB_00 ETH0_RXCTL_RXDV EMAC0 RXCTL (10/100/1000) or CRS (10/100) B PB_01 ETH0_RXD0 EMAC0 Receive Data 0 A PA_13 ETH0_RXD1 EMAC0 Receive Data 1 A PA_12 ETH0_RXD2 EMAC0 Receive Data 2 A PA_14 ETH0_RXD3 EMAC0 Receive Data 3 A PA_15 ETH0_RXERR EMAC0 Receive Error B PB_03 ETH0_TXCLK EMAC0 Transmit Clock B PB_04 ETH0_TXCTL_TXEN EMAC0 TXCTL (10/100/1000) or TXEN (10/100) B PB_09 ETH0_TXD0 EMAC0 Transmit Data 0 B PB_07 ETH0_TXD1 EMAC0 Transmit Data 1 B PB_08 ETH0_TXD2 EMAC0 Transmit Data 2 B PB_06 ETH0_TXD3 EMAC0 Transmit Data 3 B PB_05 HADC0_EOC_DOUT HADC0 End of Conversion/Serial Data Out D PD_09 HADC0_VIN0 HADC0 Analog Input at channel 0 Not Muxed HADC0_VIN0 HADC0_VIN1 HADC0 Analog Input at channel 1 Not Muxed HADC0_VIN1 HADC0_VIN2 HADC0 Analog Input at channel 2 Not Muxed HADC0_VIN2 HADC0_VIN3 HADC0 Analog Input at channel 3 Not Muxed HADC0_VIN3 HADC0_VREFN HADC0 Ground Reference for ADC Not Muxed HADC0_VREFN HADC0_VREFP HADC0 External Reference for ADC Not Muxed HADC0_VREFP JTG_TCK JTAG Clock Not Muxed JTG_TCK JTG_TDI JTAG Serial Data In Not Muxed JTG_TDI JTG_TDO JTAG Serial Data Out Not Muxed JTG_TDO JTG_TMS JTAG Mode Select Not Muxed JTG_TMS JTG_TRST JTAG Reset Not Muxed JTG_TRST LP1_ACK LP1 Acknowledge B PB_01 LP1_CLK LP1 Clock B PB_03 LP1_D0 LP1 Data 0 D PD_10 LP1_D1 LP1 Data 1 D PD_11 LP1_D2 LP1 Data 2 D PD_12 LP1_D3 LP1 Data 3 D PD_13 LP1_D4 LP1 Data 4 D PD_14 LP1_D5 LP1 Data 5 D PD_15 LP1_D6 LP1 Data 6 A PA_09 Table 20. ADSP-SC57x/ADSP-2157x 176-Lead LQFP Signal Descriptions (Continued) Signal Name Description Port Pin Name |
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