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FS32K112BHTXMLLTR bảng dữ liệu(PDF) 35 Page - NXP Semiconductors |
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FS32K112BHTXMLLTR bảng dữ liệu(HTML) 35 Page - NXP Semiconductors |
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35 / 100 page  NOTE Please refer to External System Oscillator electrical specifications for EXTAL/XTAL pins. 5.8 Device clock specifications Table 26. Device clock specifications 1 Symbol Description Min. Max. Unit High Speed run mode2 fSYS System and core clock — 112 MHz fBUS Bus clock — 56 MHz fFLASH Flash clock — 28 MHz Normal run mode (S32K11x series) fSYS System and core clock — 48 MHz fBUS Bus clock — 48 MHz fFLASH Flash clock — 24 MHz Normal run mode (S32K14x series) 3 fSYS System and core clock — 80 MHz fBUS Bus clock — 404 MHz fFLASH Flash clock — 26.67 MHz Normal run mode (S32K14xW series) 5 fSYS System and core clock — 80 MHz fBUS Bus clock — 404 MHz fFLASH Flash clock — 20 MHz VLPR mode (S32K1xx series)6 fSYS System and core clock — 4 MHz fBUS Bus clock — 4 MHz fFLASH Flash clock — 1 MHz fERCLK External reference clock — 16 MHz VLPR mode (S32K14xW series)6 fSYS System and core clock — 1 MHz fBUS Bus clock — 1 MHz fFLASH Flash clock — 0.25 MHz fERCLK External reference clock — TBD MHz 1. Refer to the section Feature comparison for the availability of modes and other specifications. 2. Only available on some devices. See section Feature comparison. 3. With SPLL as system clock source. 4. 48 MHz when fSYS is 48 MHz 5. With SPLL as system clock source. 6. The frequency limitations in VLPR mode here override any frequency specification listed in the timing specification for any other module. I/O parameters S32K1xx Data Sheet, Rev. 12, 02/2020 NXP Semiconductors 35 |
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