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FS32K112BHTXMLLTR bảng dữ liệu(PDF) 34 Page - NXP Semiconductors

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Table 23. AC electrical specifications at 5 V Range for S32K1xx series (continued)
Symbol
DSE
Rise time (nS)1
Fall time (nS) 1
Capacitance (pF) 2
Min.
Max .
Min.
Max.
tRFGPIO-HD
0
2.8
9.4
2.9
10.7
25
5.0
15.7
5.1
17.4
50
17.3
54.8
17.6
59.7
200
1
1.1
4.6
1.1
5.0
25
2.0
5.7
2.0
5.8
50
5.4
16.0
5.0
16.0
200
tRFGPIO-FAST
0
0.42
2.2
0.37
2.2
25
2.0
5.0
1.9
5.2
50
9.3
18.8
8.5
19.3
200
1
0.37
0.9
0.35
0.9
25
1.2
2.7
1.2
2.9
50
6.0
11.8
6.0
12.3
200
1. For reference only. Run simulations with the IBIS model and your custom board for accurate results.
2. Maximum capacitances supported on Standard IOs. However interface or protocol specific specifications might be
different, for example for ENET, QSPI etc. . For protocol specific AC specifications, see respective sections.
Table 24. AC electrical specifications at 5 V Range for S32K14xW series
Symbol
DSE
Rise time (nS)1
Fall time (nS) 1
Capacitance (pF) 2
Min.
Max .
Min.
Max.
tRFGPIO
NA
2.8
9.4
2.9
10.7
25
5.0
15.7
5.1
17.4
50
17.3
54.8
17.6
59.7
200
tRFGPIO-HD
0
2.8
9.4
2.9
10.7
25
5.0
15.7
5.1
17.4
50
17.3
54.8
17.6
59.7
200
1
1.1
4.6
1.1
5.0
25
2.0
5.7
2.0
5.8
50
5.4
16.0
5.0
16.0
200
1. For reference only. Run simulations with the IBIS model and your custom board for accurate results.
2. Maximum capacitances supported on Standard IOs. However interface or protocol specific specifications might be
different. For protocol specific AC specifications, see respective sections.
5.7 Standard input pin capacitance
Table 25. Standard input pin capacitance
Symbol
Description
Min.
Max.
Unit
CIN_D
Input capacitance: digital pins
—
7
pF
I/O parameters
S32K1xx Data Sheet, Rev. 12, 02/2020
34
NXP Semiconductors



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