W6100 datasheet(13/149 Pages) WIZNET

13 / 149 page

W6100 – Hardwired Dual TCP/IP Stack Controller

13/149

1.1

PIN Description

Table 2 PIN Description

PIN #

Symbol

Type

Description

GNDA

Analog Ground

TXON

Differential Transmitted Signal Pair

Data is transmitted to Media in TXOP/TXON differential

signal pair on MDI Mode.

TXOP

1V2A

Analog 1.2V Power

1V2O(PIN14) voltage source must be supplied back to this

pin.

RXIN

Differential Received Signal Pair

Data is received from Media in RXIP/RXIN differential signal

pair on MDI Mode.

RXIP

GNDA

Analog Ground

3V3A

Analog 3.3V Power

RSET_BG

Off-chip Bias Resistor

Must be connected to Analog Ground through external

12.3KΩ, tolerance rate 1% Resistance.

GND

Digital Ground

XSCO

25MHz Clock

Connect 25MHz Crystal Oscillator (XTAL) or Oscillator

(OSC) for internal operation clock (SYS_CLK).

W6100 can convert it to 25MHz or 100MHz and uses the

converted clock as SYS_CLK.

In normal mode, SYS_CLK is 100MHz.

In low frequency mode, SYS_CLK is 25MHz

* CAUTION

If OSC is used, 25MHz@1.2V must be used and only

XSCI must be connected and XSCO must be floated.

ref) “Clock Selection Guide”, same as W5100S

XSCI

1V2D

Digital 1.2V Power

1V2O voltage source must be supplied to this pin.

1V2O

Internal Regulator 1.2V Power Output

Power which Internal Regulator of W6100 supplies. It

supports Max 150mA.

W6100 bảng dữ liệu(PDF) 13 Page - WIZnet Co., Ltd

W6100 bảng dữ liệu(HTML) 13 Page - WIZnet Co., Ltd

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL