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PIC16F15213 bảng dữ liệu(PDF) 43 Page - Microchip Technology |
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PIC16F15213 bảng dữ liệu(HTML) 43 Page - Microchip Technology |
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43 / 420 page ![]() • 12 core registers • Up to 20 Special Function Registers (SFR) • Up to 80 bytes of General Purpose RAM (GPR) • 16 bytes of common RAM Figure 9-3. Banked Memory Partition Typical Memory Bank 7-bit Bank Offset 00h 0Bh 0Ch 1Fh 20h 6Fh 7Fh 70h Core Registers (12 bytes) Special Function Registers (up to 20 bytes maximum) General Purpose RAM Special Function Registers or (80 bytes maximum) Common RAM (16 bytes) Rev. 10-000 041C 11/8/201 7 9.2.1 Bank Selection The active bank is selected by writing the bank number into the Bank Select Register (BSR). All data memory can be accessed either directly via instructions that use the file registers, or indirectly via the two File Select Registers (FSRs). Data memory uses a 13-bit address. The upper six bits of the address define the Bank Address and the lower seven bits select the registers/RAM in that bank. 9.2.2 Core Registers The core registers contain the registers that directly affect the basic operation. The core registers occupy the first 12 addresses of every data memory bank. These registers are listed in Table 9-5. Table 9-5. Core Registers Addresses in BANKx Core Registers x00h or x80h INDF0 x01h or x81h INDF1 PIC16F15213/14/23/24/43/44 Memory Organization © 2020 Microchip Technology Inc. Preliminary Datasheet DS40002195A-page 43 |
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