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ASP00886IRGCR bảng dữ liệu(PDF) 6 Page - Texas Instruments

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tên linh kiện ASP00886IRGCR
Giải thích chi tiết về linh kiện  MSP430F552x, MSP430F551x Mixed-Signal Microcontrollers
PDF  139 Pages
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Trang chủ  http://www.ti.com
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ASP00886IRGCR bảng dữ liệu(HTML) 6 Page - Texas Instruments

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5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from revision O to revision P
Changes from May 1, 2019 to September 11, 2020
Page
• Updated the numbering for sections, tables, figures, and cross-references throughout the document..............1
• Added nFBGA package (ZXH) information throughout document......................................................................2
• Added note about status change for all orderable part numbers in the ZQE package in Device Information ... 2
• Added note (1) in Section 8.6, Thermal Resistance Characteristics ............................................................... 26
• Changed the MAX value of the IERASE and IMERASE, IBANK parameters in Section 8.48, Flash Memory ......... 52
Changes from revision N to revision O
Changes from September 21, 2018 to April 30, 2019
Page
• Updated Section 1, Features ............................................................................................................................. 1
• Updated Section 3, Description ......................................................................................................................... 2
• Removed the YFF package option for the MSP430F5526 and MSP430F5524 in Section 4, Functional Block
Diagrams ........................................................................................................................................................... 3
• Removed the YFF package option for the MSP430F5526 and MSP430F5524 in Section 6, Device
Comparison ....................................................................................................................................................... 9
• Removed the YFF package option for the MSP430F5526 and MSP430F5524 in Figure 7-6, 64-Pin YFF
Package – MSP430F5528IYFF ....................................................................................................................... 10
Changes from revision M to revision N
Changes from November 3, 2015 to September 20, 2018
Page
• Changed entry for Body Size of DSBGA package in Device Information table ................................................. 2
• Added Section 6.1, Related Products ................................................................................................................9
• Removed D and E dimension lines from the YFF pinout (for package dimensions, see the Mechanical Data in
Section 11) .......................................................................................................................................................10
• Added typical conditions statements at the beginning of Section 8, Specifications .........................................22
• Changed the MIN value of the V(DVCC_BOR_hys) parameter from 60 mV to 50 mV in Section 8.20, PMM,
Brownout Reset (BOR) .................................................................................................................................... 35
• Updated notes (1) and (2) and added note (3) in Section 8.26, Wake-up Times From Low-Power Modes and
Reset ............................................................................................................................................................... 37
• Removed ADC12DIV from the formula for the TYP value in the second row of the tCONVERT parameter in
Section 8.36, 12-Bit ADC, Timing Parameters, because ADC12CLK is after division..................................... 44
• Added second row for tEN_CMP with Test Conditions of "CBPWRMD = 10" and MAX value of 100 µs in Section
8.42, Comparator_B ........................................................................................................................................ 49
• Renamed FCTL4.MGR0 and MGR1 bits in the fMCLK,MGR parameter in Section 8.48, Flash Memory, to be
consistent with header files ..............................................................................................................................52
• Throughout document, changed all instances of "bootstrap loader" to "bootloader"........................................57
• Added YFF pin numbers to Table 9-11, TA0 Signal Connections .................................................................... 65
• Added YFF pin numbers to Table 9-12, TA1 Signal Connections ....................................................................66
• Added YFF pin numbers to Table 9-13, TA2 Signal Connections ....................................................................67
• Replaced former section Development Tools Support with Section 10.3, Tools and Software ......................115
• Changed format and added content to Section 10.4, Documentation Support ..............................................117
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526, MSP430F5525, MSP430F5524,
MSP430F5522, MSP430F5521, MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514,
MSP430F5513
SLAS590P – MARCH 2009 – REVISED SEPTEMBER 2020
www.ti.com
6
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Copyright © 2020 Texas Instruments Incorporated
Product Folder Links: MSP430F5529 MSP430F5528 MSP430F5527 MSP430F5526 MSP430F5525
MSP430F5524 MSP430F5522 MSP430F5521 MSP430F5519 MSP430F5517 MSP430F5515 MSP430F5514
MSP430F5513



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