MXT1664T3-ABESSQTP datasheet(38/98 Pages) MICROCHIP

38 / 98 page

MXT1664T3 2.0

DS40002054A-page 38

 2018 Microchip Technology Inc.

FIGURE 8-6:

CHG LINE MODES FOR I2C-COMPATIBLE TRANSFERS

In Mode 0 (edge-triggered operation):

The CHG line goes low to indicate that a message is present.

The CHG line goes high when the first byte of the first message (that is, its report ID) has been sent and

acknowledged (ACK sent) and the next byte has been prepared in the buffer.

The STOP condition at the end of an I2C transfer causes the CHG line to stay high if there are no more messages.

Otherwise the CHG line goes low to indicate a further message.

Note that Mode 0 also allows the host to continually read messages by simply continuing to read bytes back without

issuing a STOP condition. Message reading should end when a report ID of 255 (“invalid message”) is received.

Alternatively the host ends the transfer by sending a NACK after receiving the last byte of a message, followed by a

STOP condition. If there is another message present, the CHG line goes low again, as in step 1. In this mode the state

of the CHG line does not need to be checked during the I2C read.

In Mode 1 (level-triggered operation):

The CHG line goes low to indicate that a message is present.

The CHG line remains low while there are further messages to be sent after the current message.

The CHG line goes high again only once the first byte of the last message (that is, its report ID) has been sent

and acknowledged (ACK sent) and the next byte has been prepared in the output buffer.

Mode 1 allows the host to continually read the messages until the CHG line goes high, and the state of the CHG line

determines whether or not the host should continue receiving messages from the device.

The Communications Configuration T18 object can be used to configure the behavior of the CHG line. In addition to the

CHG line operation modes described above, this object allows direct control over the state of the CHG line.

8.7

SDA and SCL

The I2C bus transmits data and clock with SDA and SCL, respectively. These are open-drain. The device can only drive

these lines low or leave them open. The termination resistors (Rp) pull the line up to VddIO if no I2C device is pulling it

down.

The termination resistors should be chosen so that the rise times on SDA and SCL meet the I2C specifications for the

interface speed being used, bearing in mind other loads on the bus. For best latency performance, it is recommended

that no other devices share the I2C bus with the maXTouch controller.

NOTE

The state of the CHG line should be checked only between messages and not between the bytes of a

message. The precise point at which the CHG line changes state cannot be predicted and so the state of

the CHG line cannot be guaranteed between bytes.

…

STOP

START SLA-R

I C Interface

ACK

NACK

…

Message #1

Message #2

Message #m

CHG Line

Mode 0

CHG line high or low; see text

…

STOP

START SLA-R

I C Interface

ACK

…

Message #1

Message #2

Message #m

CHG Line

Mode 1

CHG line high or low; see text

…

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