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LPC5410X bảng dữ liệu(PDF) 10 Page - NXP Semiconductors |
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LPC5410X bảng dữ liệu(HTML) 10 Page - NXP Semiconductors |
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10 / 95 page ![]() LPC5410x All information provided in this document is subject to legal disclaimers. © NXP B.V. 2019. All rights reserved. Product data sheet Rev. 2.11 — 19 September 2019 10 of 95 NXP Semiconductors LPC5410x 32-bit ARM Cortex-M4/M0+ microcontroller 6.2 Pin description On the LPC5410x, digital pins are grouped into two ports. Each digital pin may support up to four different digital functions and one analog function, including General Purpose I/O (GPIO). Table 4. Pin description Symbol Description PIO0_0 A6 31 [2] PU I/O PIO0_0 — General-purpose digital input/output pin. Remark: In ISP mode, this pin is the UART0 RXD function. I U0_RXD — Receiver input for USART0. I/O SPI0_SSEL0 — Slave Select 0 for SPI0. I CT32B0_CAP0 — 32-bit CT32B0 capture input 0. I R — Reserved. O SCT0_OUT3 — SCT0 output 3. PWM output 3. PIO0_1 B6 32 [2] PU I/O PIO0_1 — General-purpose digital input/output pin. Remark: In ISP mode, this pin is the UART0 TXD function. O U0_TXD — Transmitter output for USART0. I/O SPI0_SSEL1 — Slave Select 1 for SPI0. I CT32B0_CAP1 — 32-bit CT32B0 capture input 1. I R — Reserved. O SCT0_OUT1 — SCT0 output 1. PWM output 1. PIO0_2 - 36 [2] PU I/O PIO0_2 — General-purpose digital input/output pin. I U0_CTS — Clear To Send input for USART0. I R — Reserved. I CT32B2_CAP1 — 32-bit CT32B2 capture input 1. I R — Reserved. PIO0_3 - 37 [2] PU I/O PIO0_3 — General-purpose digital input/output pin. O U0_RTS — Request To Send output for USART0. I R — Reserved. O CT32B1_MAT3 — 32-bit CT32B1 match output 3. I R — Reserved. PIO0_4 C7 38 [2] PU I/O PIO0_4 — General-purpose digital input/output pin. I/O U0_SCLK — USART0 clock in synchronous USART mode. I/O SPI0_SSEL2 — Slave Select 2 for SPI0. I CT32B0_CAP2 — 32-bit CT32B0 capture input 2. I R — Reserved. |
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