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AX58200 bảng dữ liệu(PDF) 59 Page - ASIX Electronics Corporation

tên linh kiện AX58200
Giải thích chi tiết về linh kiện  EtherCAT Slave Controller SoC
PDF  180 Pages
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nhà sản xuất  ASIX [ASIX Electronics Corporation]
Trang chủ  http://www.asix.com.tw
Logo ASIX - ASIX Electronics Corporation

AX58200 bảng dữ liệu(HTML) 59 Page - ASIX Electronics Corporation

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Copyright © 2019 ASIX Electronics Corporation. All rights reserved.
AX58200
EtherCAT Slave Controller SoC
Set HXTFDEN To enable
HXT clock detector
HXTFIF = 1?
System clock source =
“HXT” or “PLL with
HXT” ?
YES
System clock keep
original clock
NO
YES
Switch system clock to
HIRC
NO
Figure 2.3-4: HXT Stop Protect Procedure
The clock source of SysTick in Cortex® -M4 core can use CPU clock or external clock (SYST_CTRL[2]). If using
external clock, the SysTick clock (STCLK) has 5 clock sources. The clock source switch depends on the setting
of the register STCLKSEL (CLK_CLKSEL0[5:3]). The block diagram is shown in Figure 2.3-5.
111
011
010
001
HXT
LXT
HXT
HCLK
STCLKSEL
(CLK_CLKSEL0[5:3])
STCLK
HIRC
000
1/2
1/2
1/2
Figure 2.3-5: SysTick Clock Control Block Diagram



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