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AX58200 bảng dữ liệu(PDF) 38 Page - ASIX Electronics Corporation

tên linh kiện AX58200
Giải thích chi tiết về linh kiện  EtherCAT Slave Controller SoC
PDF  180 Pages
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nhà sản xuất  ASIX [ASIX Electronics Corporation]
Trang chủ  http://www.asix.com.tw
Logo ASIX - ASIX Electronics Corporation

AX58200 bảng dữ liệu(HTML) 38 Page - ASIX Electronics Corporation

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AX58200
EtherCAT Slave Controller SoC
2.2.2.1 nRESET Reset
The nRESET reset means to generate a reset signal by pulling low nRESET pin, which is an asynchronous reset
input pin and can be used to reset system at any time. When the nRESET voltage is lower than 0.2 VDD and the
state keeps longer than 32 us (glitch filter), chip will be reset. The nRESET reset will control the chip in reset state
until the nRESET voltage rises above 0.7 VDD and the state keeps longer than 32 us (glitch filter). The
PINRF(SYS_RSTSTS[1]) will be set to 1 if the previous reset source is nRESET reset. Figure 2.2-2 shows the
nRESET reset waveform.
Figure 2.2-2: nRESET Reset Waveform
2.2.2.2 Power-on Reset (POR)
The Power-on reset (POR) is used to generate a stable system reset signal and force the system to be reset when
power-on to avoid unexpected behavior of MCU. When applying the power to MCU, the POR module will detect
the rising voltage and generate reset signal to system until the voltage is ready for MCU operation. At POR reset,
the PORF(SYS_RSTSTS[0]) will be set to 1 to indicate there is a POR reset event. The PORF(SYS_RSTSTS[0])
bit can be cleared by writing 1 to it. Figure 2.2-3 shows the power-on reset waveform.
VDD
VPOR
Power-on
Reset
0.1V
Figure 2.2-3: Power-on Reset (POR) Waveform



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