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AX58200 bảng dữ liệu(PDF) 44 Page - ASIX Electronics Corporation

tên linh kiện AX58200
Giải thích chi tiết về linh kiện  EtherCAT Slave Controller SoC
PDF  180 Pages
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nhà sản xuất  ASIX [ASIX Electronics Corporation]
Trang chủ  http://www.asix.com.tw
Logo ASIX - ASIX Electronics Corporation

AX58200 bảng dữ liệu(HTML) 44 Page - ASIX Electronics Corporation

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Copyright © 2019 ASIX Electronics Corporation. All rights reserved.
AX58200
EtherCAT Slave Controller SoC
Idle Mode
NPD, LLPD, FWPD
SPD0, SPD1,
DPD
HXT
ON
Halt
Halt
Halt
HIRC
ON
Halt
Halt
Halt
LXT
ON
ON/OFF[1]
ON/OFF[1]
ON/OFF[1]
LIRC
ON
ON/OFF[2]
ON/OFF[2]
ON/OFF[2]
PLL
ON
Halt
Halt
Halt
HCLK/PCLK
ON
Halt
Halt
Halt
CPU
Halt
Halt
Halt
Halt
SRAM Retention
ON
ON
Halt
Halt
FLASH
ON
Halt
Halt
Halt
TIMER
ON
ON/OFF[3]
ON/OFF[3]
Halt
WDT
ON
ON/OFF[4]
ON/OFF[4]
Halt
RTC
ON
ON/OFF[5]
ON/OFF[5]
ON/OFF[5]
UART
ON
ON/OFF[6]
ON/OFF[6]
Halt
Others
ON
Halt
Halt
Halt
Table 2.2-5: Clocks in Power Modes
Note:
1.
LXT ON or OFF depends on SW setting in normal mode.
2.
LIRC ON or OFF depends on S/W setting in normal mode.
3.
If TIMER clock source is selected as LIRC/LXT and LIRC/LXT is on.
4.
If WDT clock source is selected as LIRC and LIRC is on.
5.
If RTC clock source is selected as LXT and LXT is on.
6.
If UART clock source is selected as LXT and LXT is on.
Wake-up sources in Normal Power-down mode (NPD):
RTC, WDT, I²C, Timer, UART, USCI, BOD, EBOD, GPIO, USBD, and ACMP.
After chip enters power down, the following wake-up sources can wake chip up to normal mode. Table 2.2-6
lists the condition about how to enter Power-down mode again for each peripheral.
User needs to wait this condition before setting PDEN(CLK_PWRCTL[7]) and executing WFI to enter Power-
down mode.
Wake-Up
Source
Wake-Up Condition
Power-Down Mode
Re-Entering Power-Down Mode Condition
NPD/
FWPD/
LLPD
SPD0/1
DPD
BOD
Brown-Out Detector
Reset / Interrupt
V
-
-
After software writes 1 to clear BODIF
(SYS_BODCTL[4]).
Brown-Out Detector
Reset
-
V
-
After software writes 1 to clear BODWK
(CLK_PMUSTS[13]) when SPD mode is entered.
LVR
LVR Reset
V
-
-
After software writes 1 to clear LVRF
(SYS_RSTSTS[3])
-
V
-
After software writes 1 to clear LVRWK
(CLK_PMUSTS[12]) when SPD mode is entered.



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