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SAF-C161PI bảng dữ liệu(PDF) 117 Page - Infineon Technologies AG

tên linh kiện SAF-C161PI
Giải thích chi tiết về linh kiện  16-Bit Single-Chip Microcontroller
PDF  400 Pages
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nhà sản xuất  INFINEON [Infineon Technologies AG]
Trang chủ  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

SAF-C161PI bảng dữ liệu(HTML) 117 Page - Infineon Technologies AG

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User’s Manual
6-1
1999-08
6
Clock Generation
All activities of the C161PI’s controller hardware and its on-chip peripherals are
controlled via the system clock signal
I
CPU.
This reference clock is generated in three stages (see also figure below):
• Oscillator
The on-chip Pierce oscillator can either run with an external crystal and appropriate
oscillator circuitry or it can be driven by an external oscillator.
• Frequency Control
The input clock signal feeds the controller hardware...
...directly, providing phase coupled operation on not too high input frequency
...divided by 2 in order to get 50% duty cycle clock signal
...via an on-chip phase locked loop (PLL) providing maximum performance on low input
frequency
...via the Slow Down Divider (SDD) in order to reduce the power consumption.
The resulting internal clock signal is referred to as “CPU clock”
I
CPU.
• Clock Drivers
The CPU clock is distributed via separate clock drivers which feed the CPU itself and two
groups of peripheral modules. The RTC is fed with the prescaled oscillator clock (
I
RTC)
via a separate clock driver, so it is not affected by the clock control functions.
Figure 6-1
CPU Clock Generation Stages
Prescaler
PLL
SDD
CPU
Peripherals,
Interfaces
Ports, Intr.Ctrl.
Idle mode
PCDDIS
P.D.mode
RTC
Osc
Oscillator
Clock Drivers
Frequency Control
32:1
I
RTC



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